k7的这些时钟资源怎么用啊?
本帖最后由 xdh_k7 于 2021-8-24 10:51 编辑尤其是那些差分时钟, 我用原语转成普通始终后好像没什么用? 用ILA也无法抓到波形?//-----------------------------------------------------------------------------
//
// (c) Copyright 2013 Tronlong, Inc. All rights reserved.
//
//-----------------------------------------------------------------------------
`timescale 1ns / 1ps
module tl_led_flash(
input clk_p,
input clk_n,
outputregled // led gpio output
);
// Delay lenght: 32_500_000, 500ms, by used 65MHz cfgmclk
parameter DELAY_LEN = 28'd100000000; //26'd3249_9999;
reg delay_cnt;
wire cfgmclk;
//wire eos_n;
IBUFDS IBUFDS_inst(
.I(clk_p),
.IB(clk_n),
.O(cfgmclk)
);
//STARTUPE2 #()
//STARTUPE2_inst (
// .CFGMCLK(cfgmclk), // 1-bit output: Configuration internal oscillator clock output 65MHz.
// .EOS(eos_n) // 1-bit output: Active high output signal indicating the End Of Startup.
//);
// Led flash with delay counter by cfgmclk
always@(posedge cfgmclk)
// if(!eos_n)
// begin
// delay_cnt <= 26'd0; // reset delay_cnt
// led <= 2'b0; // led output low
// end
// else
if(delay_cnt == DELAY_LEN)
begin
delay_cnt <= 26'd0; // reset delay_cnt;
led <= ~led; // change led output status;
end
else
delay_cnt <= delay_cnt + 1'b1;
endmodule
create_clock -period 10.000 -name sys_clk
set_property PACKAGE_PIN AA3
set_property IOSTANDARD LVDS
set_property PACKAGE_PIN AF3 }]
set_property PACKAGE_PIN AF2 }]
set_property IOSTANDARD LVCMOS15 }]
set_property IOSTANDARD LVCMOS15 }]
# enable bitstream compression
set_property BITSTREAM.GENERAL.COMPRESS TRUE
您好，您使用的是我司哪个平台的开发板？
麻烦您将问题发到我司技术邮箱support@tronlong.com，这边通过邮箱给您跟进。
JSZC 发表于 2021-8-25 09:47
您好，您使用的是我司哪个平台的开发板？
麻烦您将问题发到我司技术邮箱support@tronlong.com，这边通过邮 ...
TLK7-EVM 开发板
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