4 }( ?/ b' I0 v! u4 X5 l5 X /* For AB-synchronized transfers, BCNTRLD is not used. */ 4 T1 Z8 p% n! v. L4 ^$ b' w paramSet.bCntReload = PING_PONG_BCNT;; N ]! @9 K2 c
6 p9 L, ?9 P' j4 T9 H5 \0 o' @- E5 }; x
/* Src in constant mode Dest in INCR modes */ W t6 c2 c+ G( t) g6 ~: m paramSet.opt &= 0xFFFFFFFDu; 1 Y0 P( j# H, o //paramSet.opt &= 0xFFFFFFFCu; " a) b1 n, F; E, Z- T6 K 2 G8 L" \6 S2 c- [9 C9 r; e. K /* Program the TCC */4 `* i" s, S) b2 u3 l/ @0 M2 c
paramSet.opt |= ((tcc << OPT_TCC_SHIFT) & OPT_TCC_MASK); % l: m, a& C9 m6 o; V" Z # N( J6 _ e4 Y/ Z /* Enable Intermediate & Final transfer completion interrupt */% ]3 s9 v3 g4 R+ f$ f' F
paramSet.opt |= (1 << OPT_ITCINTEN_SHIFT); * u- z2 r& Y# R* G* j9 L paramSet.opt |= (1 << OPT_TCINTEN_SHIFT); t9 V7 ]0 O3 A) C 1 ^7 ^9 S+ H" R. C+ D /* AB Sync Transfer Mode */9 s% q1 I! w5 y9 B
paramSet.opt |= (1 << OPT_SYNCDIM_SHIFT);+ t/ W5 U, ^! Z: d
& \& {) q" d$ a9 N7 Z, F /* Program the source and dest addresses for master DMA channel */3 h; g- r( i7 z( H# Y9 l; ^9 _8 Z. p
paramSet.srcAddr = (uint32_t)(MCASP_BASEADDR+0X029C); , a B% A+ |0 `6 k2 B paramSet.destAddr = (uint32_t)(ping_buffer); 2 }& \2 g3 B- v' ~* }/ q5 p# {0 u" ?5 Q9 ~8 q
/* Write to the master DMA channel first. */7 p$ Y. f0 H6 r* z2 P
result = EDMA3_DRV_setPaRAM(hEdma, chId, ¶mSet);" E. ]' S% X! B: {* |) e
} & N1 \* Z0 Q. x' \
. w9 f) j+ n4 e9 [6 e result = EDMA3_DRV_enableTransfer(hEdma,chId,EDMA3_DRV_TRIG_MODE_EVENT); 1 J% D& A1 ~5 V4 e 5 D: G0 Q7 @/ `$ Y/ Y! G
if(result == EDMA3_DRV_SOK) Z0 S% R/ a( b# Z5 C {; \2 X% v) _- g3 E
print2arm("edma3 driver init success.",0); ! `8 j5 X4 y2 Y4 { } / Z7 n& V! l) h2 U% u
} ! g1 h2 ^- b/ q( @8 p' u( ^: o$ d; ^6 Z. A! F8 P. @