* x- u$ s6 R, j7 Ichar ping_buffer[PING_PONG_BCNT];" s; f8 p$ V" `- {' j, ~, z
char pong_buffer[PING_PONG_BCNT]; % T2 F8 {; R5 e E% b; I6 {1 v6 c % w* {* K* P' ? Q3 U L, g9 G. d/ J; V
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3 V' t. V& i! a. ystatic void ys_edma3_init() / \! c+ O V* V2 L{ ( j6 |" ~/ k9 g, e% f9 \2 R7 ? EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0};" M; d+ |; ^; @0 ~- a" w. e
EDMA3_DRV_Result result = EDMA3_DRV_SOK;, |% Z5 n: ^' v# E4 N/ i$ {8 x
EDMA3_DRV_Handle hEdma;# l9 K, A, ~5 W3 ]0 z7 y+ b0 |
uint32_t chId = 0;8 _: A2 R' C% R" g
uint32_t tcc = 0;6 c) M) a6 @. a) {3 ` ~
" M# F M3 D. x5 M, Q print2arm("edma3 driver init...",0); % Q) S/ f8 y% U7 L* W ) v5 d2 o1 S4 v. L2 a/ n1 q9 P- U hEdma = edma3init(0,&result); " I0 j c8 r6 D, Y3 d( Z if(hEdma)* t( C( L% F6 j
{ 3 q6 |' N( i1 b6 s) X print2arm("edma3init() Passed.",0);4 m6 R1 p1 \$ v# R* Z" d* [2 @
}; d4 H1 x* C* @( [
else6 I# T8 B% H9 S5 G, [6 m4 `" o! D
{ - G ~2 e' t1 m% d0 ?: e0 A) P print2arm("edma3init() Failed.",0);8 i& R! e1 l& ^
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: h) p D7 E3 }9 ]( e9 n8 e. Z if (result == EDMA3_DRV_SOK) + b! N* @0 J3 L* [& w {/ |" H: R7 S7 g j/ U! i3 O$ i
result = EDMA3_DRV_requestChannel (hEdma, &chId, &tcc,; o) n8 f5 j( B& ~( u+ I6 t' B
(EDMA3_RM_EventQueue)0, * T, Z& @1 g, [8 S- L" X5 q: m &edma3_isr, NULL); & q; g. P3 P7 M+ I1 G } 0 Z" s3 O7 p( p# n/ K 2 S7 P/ `4 L* @$ X: E3 [ if(result == EDMA3_DRV_SOK)) n/ i* ^; e: @
{ ! w1 R7 d3 D/ s paramSet.srcBIdx = 0;% J9 o, \* P9 e5 D. F+ s) y* ?
paramSet.destBIdx = 1; r0 e% y% b5 Z, I, S* P8 ~0 l paramSet.srcCIdx = 0;+ b7 d% |# W2 i+ K
paramSet.destCIdx = 0; . z. e. [9 j% S$ D- S paramSet.aCnt = PING_PONG_ACNT;9 ]8 F/ {, W9 A& X/ T
paramSet.bCnt = PING_PONG_BCNT; ) e) B9 S: o ^+ s* [ paramSet.cCnt = PING_PONG_CCNT;7 q5 S/ v% H4 _& g6 E. ^+ a% ~7 c
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/* For AB-synchronized transfers, BCNTRLD is not used. */% F8 n- S4 O" N1 |3 P9 j3 C
paramSet.bCntReload = PING_PONG_BCNT; & M* P& b: A4 L R% n) E5 J3 t( U/ x" n- ~ /* Src in constant mode Dest in INCR modes */ 0 {- g3 E9 f- d7 x paramSet.opt &= 0xFFFFFFFDu;0 `! Q; h4 B8 \& O x
//paramSet.opt &= 0xFFFFFFFCu; F- ^( V, R9 t% ]2 D 3 }4 d3 n+ D4 p /* Program the TCC */ 8 D9 V( X; u) I- D9 p: J. F paramSet.opt |= ((tcc << OPT_TCC_SHIFT) & OPT_TCC_MASK);5 u1 i8 N6 R4 X, M6 I
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/* Enable Intermediate & Final transfer completion interrupt */ 9 r6 V$ z. e" Y, |- f# Z" N paramSet.opt |= (1 << OPT_ITCINTEN_SHIFT); - v" E+ w5 Q/ v H paramSet.opt |= (1 << OPT_TCINTEN_SHIFT); 3 Q, N& p6 a! @' J% E4 k3 k. u 5 |# a3 A9 A$ u% h6 }. c9 l' u /* AB Sync Transfer Mode */ ; n- x/ p1 c; a0 {/ Q+ @ paramSet.opt |= (1 << OPT_SYNCDIM_SHIFT);: K2 L) M4 y- `' ]5 I a w
' ?, y' v1 c2 G /* Program the source and dest addresses for master DMA channel */6 q: t, | B( R6 [
paramSet.srcAddr = (uint32_t)(MCASP_BASEADDR+0X029C); ) A, P- a. w* S) w3 h: { paramSet.destAddr = (uint32_t)(ping_buffer);& H) g. ^+ E* W$ t1 N+ b
/ A8 s! G/ l$ L! [% M /* Write to the master DMA channel first. */8 a: |6 K, C! B; i( I# q
result = EDMA3_DRV_setPaRAM(hEdma, chId, ¶mSet);! f' q4 r5 b. \( n+ f7 f
} ; p* m( G4 p* b# s+ Y" C2 J# T# @; G# ^7 D1 j+ y
result = EDMA3_DRV_enableTransfer(hEdma,chId,EDMA3_DRV_TRIG_MODE_EVENT); 6 F- }9 i; `) y5 P4 H : F' q, G+ J$ h+ W# E if(result == EDMA3_DRV_SOK) 6 z+ j0 V1 a% l# ~3 I1 D9 [5 { {" I; m3 R9 g r$ ^; _
print2arm("edma3 driver init success.",0);6 [ G" P) ^& ], p r1 G% ?8 ]% A2 |
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