标题: edma3中断只能进去一次 [打印本页] 作者: silent123 时间: 2015-4-22 22:01 标题: edma3中断只能进去一次 使用mcsdk中的edma3lld库写的edma3驱动，在omapl138的dsp核运行，但是中断函数只能进去一次，路过的朋友帮忙看看，感谢万分。代码如下：1 t8 M8 M2 M- E/ {1 R g0 W c, P
#define PING_PONG_ACNT 1 . p( N% [, M, y5 K$ o9 C#define PING_PONG_BCNT 8*32*40 7 R$ { l0 @# a8 N% G: i//#define PING_PONG_BCNT 1 * r! ~1 A( O+ w$ Y; @
#define PING_PONG_CCNT 11 Q, U- G) ]' }3 Y' C
#define MCASP_BASEADDR 0x01D00000 c. C) h) v1 t5 w4 F. V7 X, k+ _6 W) h* d#define Mcasp_RXEVENTQUE (0u)5 v9 K2 @1 G' \
' |0 Y; q& o K& z
/* OPT Field specific defines */. e/ X' [3 L. s8 z* v
#define OPT_SYNCDIM_SHIFT (0x00000002u)& j7 o- ^& F& U! g* r1 U7 l" a
#define OPT_TCC_MASK (0x0003F000u) . p/ s$ I; w# M0 Q7 s#define OPT_TCC_SHIFT (0x0000000Cu)0 u9 ^6 C. y9 i
#define OPT_ITCINTEN_SHIFT (0x00000015u) . y6 j, e" `6 r) s#define OPT_TCINTEN_SHIFT (0x00000014u) - M1 P) y# z! I1 h0 f6 A % K- x8 O/ o: L# W; `char ping_buffer[PING_PONG_BCNT];# a7 k: y) G! L+ I9 L
char pong_buffer[PING_PONG_BCNT];* ]* L/ _5 [6 ^+ V
9 F/ g3 \$ e$ O
/ H- Z: l8 ]( J. ~7 g
3 d/ a$ v0 b$ h2 ^/ i; n4 X' T' z8 v$ t
static void ys_edma3_init()4 K: K* R2 p( c$ t) _
{) U- T6 R9 G4 S( g
EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0}; * L7 A4 q$ ^& g) f EDMA3_DRV_Result result = EDMA3_DRV_SOK;, v, D( s% ~& }0 T; K
EDMA3_DRV_Handle hEdma;* D0 \- U3 R, n6 t; M0 V
uint32_t chId = 0;- r: x+ n3 \. u0 ]; ~$ C/ `
uint32_t tcc = 0; 1 x8 m4 q. f5 F3 D , P& q; b' Y& E7 b4 y print2arm("edma3 driver init...",0); 6 O+ l/ C+ F* @1 z 3 Z- ]# Q4 x, E: q0 @( F3 m2 Q- t hEdma = edma3init(0,&result); - E d% a: B$ m! e; t if(hEdma) ( c3 z3 p8 y9 E9 H, R { ; n6 G9 K2 p8 j print2arm("edma3init() Passed.",0); ! x7 \/ P: ~; U( f0 U3 R, @7 y }+ |1 L" Z8 B$ _. L: Q8 f, M' [4 Q
else- x+ a4 C9 B3 y- r/ X: Y$ ?. Y0 y
{ B" K0 ]/ e7 j2 x& i print2arm("edma3init() Failed.",0); # ]/ U, A. q! D8 N! ^8 ] } " v2 z0 l+ `2 P+ X7 _9 d* c ) E2 J" H! U O. @* B
if (result == EDMA3_DRV_SOK); R/ Q/ s/ t* u& \2 h
{ 1 p/ c* i$ d3 |) N result = EDMA3_DRV_requestChannel (hEdma, &chId, &tcc,% T0 f+ U$ C& K& e* a3 d5 `4 x E. W
(EDMA3_RM_EventQueue)0, 0 v- B3 F. S9 I8 ]6 Q6 t$ E8 a* I &edma3_isr, NULL); 8 ~* a/ D; i; M0 X5 g! g } X" f8 l: r# D! m9 x1 a
+ j! q2 D) e1 h x3 s7 ]. @- B
if(result == EDMA3_DRV_SOK) - Y* }2 A- C T. s { ' O' [; ]; H4 Z paramSet.srcBIdx = 0;7 N% g% X! p5 u
paramSet.destBIdx = 1;/ v' u: _. @( n8 H) p! X, I w0 X
paramSet.srcCIdx = 0; 3 g. b) {+ v8 B' S) ] paramSet.destCIdx = 0; 8 y* I8 H: N3 K8 p5 E paramSet.aCnt = PING_PONG_ACNT;! @/ A+ f" t4 B1 S3 Z$ z4 ?+ k
paramSet.bCnt = PING_PONG_BCNT; ?) q6 ~$ t% h' Q7 I! Z- h9 B+ _: _9 U paramSet.cCnt = PING_PONG_CCNT; S6 d# |' R1 ~) V
$ u: m; @1 n6 I. s0 O /* For AB-synchronized transfers, BCNTRLD is not used. */- R" Z2 W/ p0 w' z4 T8 `! o( Z( v$ z
paramSet.bCntReload = PING_PONG_BCNT;8 C* A; a* ?4 ?0 c: e
7 X/ o3 S) h4 z8 ^# M) N5 Z# T) F /* Src in constant mode Dest in INCR modes */ 3 o7 D, B% N9 m3 G/ i( w; d paramSet.opt &= 0xFFFFFFFDu;/ L3 M. L) @. k6 r! E6 x( p( Y
//paramSet.opt &= 0xFFFFFFFCu; 5 t2 @, n7 i% R2 M 6 E3 U( ^: W$ p5 }; t4 i /* Program the TCC */ 1 v! p( D* H. r' C- C paramSet.opt |= ((tcc << OPT_TCC_SHIFT) & OPT_TCC_MASK); . i" Q( T7 k0 A& I9 x ) M5 g0 n, a' m3 d/ Q1 O /* Enable Intermediate & Final transfer completion interrupt */) O- L( l7 h. A
paramSet.opt |= (1 << OPT_ITCINTEN_SHIFT); 3 u; o; S ?3 w" W9 E. }! D4 y( m* K paramSet.opt |= (1 << OPT_TCINTEN_SHIFT);. G( G/ Q) R" [. C8 J; H1 d
8 H. Q% N" Y! @' {7 Q /* AB Sync Transfer Mode */ 8 W& y9 u1 @/ I6 r( ? paramSet.opt |= (1 << OPT_SYNCDIM_SHIFT);' J0 Z' \! J' i X' ]5 v7 a# I
! |4 e6 l5 J8 R /* Program the source and dest addresses for master DMA channel */+ j i0 w, ?$ ?* ?; J
paramSet.srcAddr = (uint32_t)(MCASP_BASEADDR+0X029C); # S( x" o. \! P4 t8 Y paramSet.destAddr = (uint32_t)(ping_buffer);% l8 `5 b9 W- B$ u& ^
' i, [! e: J G4 u- v" u9 B
/* Write to the master DMA channel first. */8 p2 D3 R) P+ [% q0 G
result = EDMA3_DRV_setPaRAM(hEdma, chId, ¶mSet);2 d7 Q" j1 R" G& J1 J- O
} 8 D) s p( I% n$ R
6 V8 N# E4 { y7 N7 X. c result = EDMA3_DRV_enableTransfer(hEdma,chId,EDMA3_DRV_TRIG_MODE_EVENT);- k3 d# M5 w3 r0 j. b