' n3 k: D/ d( O: y$ X; a# C; R/* OPT Field specific defines */, j+ W: ?6 z; Z0 @& w( ?
#define OPT_SYNCDIM_SHIFT (0x00000002u)! w! V3 w5 p$ r) c% E( k
#define OPT_TCC_MASK (0x0003F000u) % H* v) F0 l; I+ M+ t#define OPT_TCC_SHIFT (0x0000000Cu) + Y+ g, B9 C N% @#define OPT_ITCINTEN_SHIFT (0x00000015u) 8 R& d6 \; k7 ^* U; u, K#define OPT_TCINTEN_SHIFT (0x00000014u) 4 U% u9 d: g, m$ P2 D9 l % i, ~3 d7 D/ h6 w7 U' r- g: \ H7 Pchar ping_buffer[PING_PONG_BCNT];( Q: x6 N' y- V3 D* B4 F" t; T" m
char pong_buffer[PING_PONG_BCNT];5 r: F- t, Y/ c7 h) `' b
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; l$ @3 E- Q) y- ]/ t4 C6 A; r+ t7 Q# k % e/ p8 E& F! v% W; `1 m" L& Ystatic void ys_edma3_init()/ r+ ~) T! g: c( I
{ + f9 |( H6 K' N4 d EDMA3_DRV_PaRAMRegs paramSet = {0,0,0,0,0,0,0,0,0,0,0,0}; |# o2 ~0 G1 I! b6 P: _7 C( H, R EDMA3_DRV_Result result = EDMA3_DRV_SOK; - n1 y, x! |) {, i/ z d# f q" n EDMA3_DRV_Handle hEdma; / M6 ^% Z9 A2 C* V6 ^( j4 ] uint32_t chId = 0; - [( y' H" l: \ uint32_t tcc = 0;9 V* O7 @) l6 Z6 c
9 _# {9 s: K: [( Q) h: m# j print2arm("edma3 driver init...",0); * N( h. V* o4 i% v8 b# k8 m6 D6 q, Y8 V+ w0 J
hEdma = edma3init(0,&result);5 U8 U ^ P) g: N7 G
if(hEdma)- P+ P3 R8 h* x
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print2arm("edma3init() Passed.",0);2 `7 }. A0 m3 f D- S& L0 ^
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else + E# L" [" X+ \, a {2 N3 x3 r5 M3 q5 n# ~$ U) c
print2arm("edma3init() Failed.",0);' {* l0 f4 N% @9 z0 }! s$ _8 C
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! d8 m6 O" `" ], }. o H$ a if (result == EDMA3_DRV_SOK)8 C1 s9 W* f5 F% [' v
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result = EDMA3_DRV_requestChannel (hEdma, &chId, &tcc, ' ?6 U( \' C- g# [0 P8 X (EDMA3_RM_EventQueue)0,7 N% P$ n4 M# k" v9 q; ~$ X
&edma3_isr, NULL); 7 q/ A M# J! o7 S6 K9 Q. M9 N } - r$ [- `! C9 f$ k' o3 `, A( @ ' y. _' q! ^) A: [: M; x
if(result == EDMA3_DRV_SOK)+ y, a$ m# Y; i6 d0 M* V
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paramSet.srcBIdx = 0; 8 D7 S& x9 w2 F/ j: | paramSet.destBIdx = 1; l i, Y4 w: | paramSet.srcCIdx = 0;& z5 F9 j% i* ^4 @8 w0 Y* h
paramSet.destCIdx = 0;4 m; q$ P* H# ]5 H0 I8 j+ t
paramSet.aCnt = PING_PONG_ACNT; / C$ K6 J* O& U: b1 j3 z3 R paramSet.bCnt = PING_PONG_BCNT;8 [$ B5 H; P7 d9 b) @1 G5 @
paramSet.cCnt = PING_PONG_CCNT;9 d, C+ {- |- c7 P# {$ ]
/ M' B. U; x6 B8 ?0 @ /* For AB-synchronized transfers, BCNTRLD is not used. */ 3 b U( d- ?3 z paramSet.bCntReload = PING_PONG_BCNT;5 T7 e% m( Q$ o$ y) z4 w9 G
0 i0 h7 a3 V7 h /* Src in constant mode Dest in INCR modes */( P/ ?" X8 n" g; P& \
paramSet.opt &= 0xFFFFFFFDu;0 X: @2 j6 U$ ~7 U
//paramSet.opt &= 0xFFFFFFFCu; " R" p7 E9 R+ o4 L9 U" T ( ^# B- G5 p1 v# }' y6 p' a /* Program the TCC */ 3 O( L* q6 F$ \ paramSet.opt |= ((tcc << OPT_TCC_SHIFT) & OPT_TCC_MASK); L9 n! I; ^2 | ~$ l- [
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/* Enable Intermediate & Final transfer completion interrupt */1 U- g+ }) P0 H* `; v
paramSet.opt |= (1 << OPT_ITCINTEN_SHIFT); * D& `3 H; m$ }3 L paramSet.opt |= (1 << OPT_TCINTEN_SHIFT); 3 l5 a; |& w- ^! K% A, Z" X4 P3 s4 S
/* AB Sync Transfer Mode */ 4 h: |) o T2 p/ c$ ]! }, c paramSet.opt |= (1 << OPT_SYNCDIM_SHIFT); . y$ ~* ` l/ W% u" U3 J8 l. f * X( m# N+ \' l4 n( O: v v9 z( N
/* Program the source and dest addresses for master DMA channel */2 ~/ m9 k' z! E$ l, h
paramSet.srcAddr = (uint32_t)(MCASP_BASEADDR+0X029C);- E) k5 I4 K& n8 Y _$ a$ `$ d
paramSet.destAddr = (uint32_t)(ping_buffer); 8 f& F2 ~ B0 l3 b$ X2 ?. j2 [* K$ p, D- ~# L& |% _3 e
/* Write to the master DMA channel first. */# M( J3 C3 T; E' B
result = EDMA3_DRV_setPaRAM(hEdma, chId, ¶mSet);' C' i9 r7 d& D( P' Y# l3 Y/ p% H
} ( m5 q0 h% w1 P# s4 T
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result = EDMA3_DRV_enableTransfer(hEdma,chId,EDMA3_DRV_TRIG_MODE_EVENT); [: p8 f9 f7 m5 [8 b) J6 S : F# ~: c7 c& K1 A2 a h# _0 x
if(result == EDMA3_DRV_SOK) + a) K" A( \8 s2 I {' r( S+ W% z; ]; k; S) j
print2arm("edma3 driver init success.",0); / N' p+ X+ U( v4 u4 Z" q } 6 A/ l; ]# J* c/ H/ d0 ]. H
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