//his function selects the master for an EMIF1 instance among CPU1 or CPU2.
EMIF_selectMaster(EMIF1CONFIG_BASE, EMIF_MASTER_CPU1_G);
// EMIF_selectMaster(EMIF1CONFIG_BASE, EMIF_MASTER_CPU1_G);
//
// Commit the configuration related to protection. Till this bit remains
// set, contents of EMIF1ACCPROT0 register can't be changed.
//
EMIF_commitAccessConfig(EMIF1CONFIG_BASE);
//
// Lock the configuration so that EMIF1COMMIT register can't be changed
// any more.
//
EMIF_lockAccessConfig(EMIF1CONFIG_BASE);
//
// Configure GPIO pins for EMIF1.
//
setupEMIF1PinmuxSync8Bit();
// setupEMIF1PinmuxAsync16Bit();
//
// Configures Normal Asynchronous Mode of Operation.
//
EMIF_setAsyncMode(EMIF1_BASE, EMIF_ASYNC_CS2_OFFSET,
EMIF_ASYNC_NORMAL_MODE);