标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 [打印本页] 作者: yusijiangchengm 时间: 2016-3-15 16:07 标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 C6747和C6748感觉差不多，我想实现McASP发送中断方式控制音频信号，在轮询的例程基础上改的，轮询程序可以实现，但是中断一直实现不了，也找不到错误，求大神帮忙！下边是主要程序：$ l/ V7 `7 w1 p
main文件：+ a/ @- M( C* K) @% U1 [& p0 d
interrupt void interrupt4(void) , Z u2 g! G8 S/ A/ \
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Uint32 sample;; F1 ]' X- J3 q# N! E! N
; s8 O) W" m2 ~9 b sample = input_sample(); // read L + R samples from ADC / i5 P3 H$ W8 R( v. n/ f8 K output_sample(sample); // write L + R samples to DAC : `0 T |" ]& P7 N" A9 G2 ~* q( z
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# U' J1 h" W0 N" [int main( void ) ) N3 x9 N4 \3 G5 T! m# V{" e$ l1 \8 X! h' a
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/* Initialize BSL */! J u3 v' Q( o! o9 t
EVMC6747_init( );% j- e6 E# O5 W! c, E' I
/* Call evmc6747_intr function */4 g! E* M8 L- S, N
aic3106_init( ); ' D1 k- x1 ]% Z0 O while(1); # K3 W I: ^5 S* P) ~. w: `}8 o" _2 G6 Z4 d$ A
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aic3106_init文件的一部分，McASP配置部分，采用内部时钟，I2S方式，同步传输。音频芯片的配置应该没问题% S0 H6 p& l$ N0 E1 e( B. U
/* Initialize MCASP1 */! W4 ~9 _( ]$ G4 Q/ k+ _
mcasp = &MCASP_MODULE_1;5 ]5 L" z3 m* y* V/ q/ Z
mcasp->regs->GBLCTL = 0; // Reset9 C$ D# H- f: w) k+ @8 w$ j
mcasp->regs->RGBLCTL = 0; // Reset RX ; ?9 r' _( y0 e$ W# V. n mcasp->regs->XGBLCTL = 0; // Reset TX+ G1 {+ C8 M, ?& A: I
mcasp->regs->PWRDEMU = 1; // Free-running6 E1 _3 r5 A. o* S; D5 {$ Q0 g. T
// configure McASP0 receive registers 4 i ~8 h7 x, y8 B- `- X* f mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used # h4 `. c9 g; k4 O mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus( x/ C1 N8 F0 A4 a+ X# Z
mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word$ E5 y5 k) _6 c% e4 k- B
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side) * i* d& Y3 B+ S* ]' u8 l; j mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side) / a# A1 w2 @ S mcasp->regs->RTDM = 0x00000003; // Slots 0,1; }: N$ Y" j) s6 i
mcasp->regs->RINTCTL = 0x00000000; // Not used $ a3 G( l* H! O9 y" a# H mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-2563 Z m- \4 c+ y( ?4 e+ |
; d0 S/ b/ `7 a1 c/ X, C2 M mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used " n' z* m) b* Y, d" y& m mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus ; W" T( B, n' D9 m; C9 @% o mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word" M. S* g' n) d: D2 q. r
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16( s. x1 s$ e8 m1 N# ^) T
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK ' l# c8 v/ r1 u) ~ mcasp->regs->XTDM = 0x00000003; // Slots 0,1 1 ~2 W) z( f# i1 f' x mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit5 \9 k4 t" R/ Q- @- g/ o5 C
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-2561 ^! [* { Y% F9 H2 T5 N& Z, K
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mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN 0 }, F+ A `9 P7 e mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT 6 \* ~$ W. U( M# S, a6 @* q6 w( k% E mcasp->regs->PFUNC = 0; // All MCASPs 1 y9 s( k1 N& ?! m2 D$ p. e mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1 " b2 q" n p: f! | A8 ?6 s" e " q6 q- d4 H% y/ l* Z# v mcasp->regs->DITCTL = 0x00000000; // Not used0 P8 i- N. A, a6 F
mcasp->regs->DLBCTL = 0x00000000; // Not used ' |) q) D& m2 ]; a3 L/ y mcasp->regs->AMUTE = 0x00000000; // Not used. T. @" ]3 U' u0 o7 d6 L
9 H/ _- a5 s7 x& y8 m" C5 o/* Starting sections of the McASP*/ ) z5 G" \( p" t! c) `1 O3 a1 U mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; : Q9 n* @9 e) a: j8 m- F, R/ h
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); 8 {% ~; X3 U4 _% H7 ~ u& P mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; # x# r" o; q/ j) S& w! q
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON ); d* g+ X8 O$ ^/ o" |3 p, g4 s/ J( w( K/ c* K
mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; $ b( O# W8 a- @5 u
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON ); 0 U+ c$ [0 F% K+ \5 t+ H mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; - D8 W8 B: d7 }- F2 p
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON ); 3 X& O1 K0 ~$ W# L . L A- h6 C/ g+ D5 j5 C( E+ r mcasp->regs->XSTAT = 0x0000ffff; 4 D1 s W3 N. N$ ]; g2 I mcasp->regs->RSTAT = 0x0000ffff; : w; r) m6 R5 Q9 F7 v/ F: N
5 ^, P6 I5 Q( p9 v& c0 }3 s6 O# r0 u mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;: U& t/ T! i4 e S& Z# a: k: r
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );7 [2 ~. V( _) N7 {2 }, w
mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; 9 T; I7 `! \) i+ E
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );% A6 s% t; g2 S
3 @( A6 T6 z# |% R# }. ]4 X; w6 ~ /* Write a 0, so that no underrun occurs after releasing the state machine */ , m) i" W1 Q4 {" i mcasp->regs->XBUF5 = 0; $ Y' d# t: g/ L" D; | mcasp->regs->RBUF0 = 0;$ m" ]0 ?+ h8 ~; z; f& t) X
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mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; " {: T/ e. O1 D1 W% z7 Y- J$ @: q9 Z while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );2 J3 z" ^. C. O4 i+ S" }
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; 2 x9 ^& D) s/ ]9 a# e' } while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON ); # V, _8 ]4 k8 f z; c }3 \0 e% p# p$ D& v
mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; 2 ?, ~; K: P; M. T1 \1 {4 T while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON ); - q& x% G, E2 L/ m8 K/ L mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; 2 S% O- W6 E9 U- j2 }% L3 _ while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );4 i* |; }! d. C& j