标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 [打印本页] 作者: yusijiangchengm 时间: 2016-3-15 16:07 标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 C6747和C6748感觉差不多，我想实现McASP发送中断方式控制音频信号，在轮询的例程基础上改的，轮询程序可以实现，但是中断一直实现不了，也找不到错误，求大神帮忙！下边是主要程序：' l9 Q! A4 U2 u( c" u$ S7 Z9 z5 l
main文件： , t* K8 O$ C8 P9 \, tinterrupt void interrupt4(void) " ~9 {2 a$ i! p* H1 m: m{ : e2 {1 P6 N" G( O# q8 x E. S, e ^ Uint32 sample;, |% t4 |4 E, F7 {/ s
1 M5 K7 @% R1 E) Z1 v6 V sample = input_sample(); // read L + R samples from ADC " u" m$ @2 K9 M9 K/ W8 ~! I output_sample(sample); // write L + R samples to DAC ' R# l3 n+ M) h7 c- Z7 d% z return;% d; v3 z+ j: W, E4 {
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0 B0 @' V% W, E. D2 ~; ?2 r n$ {int main( void ) $ Z% A( m+ }* d{ 7 v, Y& Q+ T% d% |0 B0 |* x8 H6 y1 U6 ]+ {5 y4 { M8 \
/* Initialize BSL */* R: `5 c9 ]3 i7 [
EVMC6747_init( );: Q$ c& X- P: e+ |# Q" I; x
/* Call evmc6747_intr function */, `. o) a/ w G9 w
aic3106_init( ); 6 @6 c- C7 D6 Q, {' Y' I/ o. d while(1);' X' i( d* | f \: q
} 4 x) b9 f% ^' Q F. F1 W # a5 S& z* X. S) `+ A6 G8 j - S' q+ N% ^$ Y: yaic3106_init文件的一部分，McASP配置部分，采用内部时钟，I2S方式，同步传输。音频芯片的配置应该没问题* s* k$ v: V/ t1 `0 c5 z
/* Initialize MCASP1 */ ( K R1 d( v9 t0 @7 A mcasp = &MCASP_MODULE_1;) ^; n: g4 O! Y- c
mcasp->regs->GBLCTL = 0; // Reset U9 I: e5 l! T4 \* |; g mcasp->regs->RGBLCTL = 0; // Reset RX , ]' z6 U2 {6 `" j mcasp->regs->XGBLCTL = 0; // Reset TX* O3 y% b6 ~# ]" p
mcasp->regs->PWRDEMU = 1; // Free-running + V% J0 Z5 L7 n, m. y# ? // configure McASP0 receive registers. ]8 U! ^9 n u. K$ Z
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used) v4 T" G- h ^( y1 q' O" @+ O7 F1 P
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus: s& S& P7 j4 \$ R( W
mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word ! ?$ Q! s/ \4 S6 W& m: r) o mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side): ~ I, r4 P) g* x g% T
mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side) 7 X" K$ U" n, E- m+ n, c R mcasp->regs->RTDM = 0x00000003; // Slots 0,1 $ R$ b9 z, P8 L; K. ?5 ] mcasp->regs->RINTCTL = 0x00000000; // Not used 6 a6 p! x! h2 ^: ?, x: h: s$ E mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256 5 x- z. ~1 z. k, x' i& v8 q3 g
mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used # q3 C3 r" l4 Q+ E mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus4 l: o! b! v w" n
mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word. D1 s) w* U4 X% r- ~
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16 1 i* z1 L K* b/ Y2 C6 q; b mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK / I0 B+ z/ M. q( P7 R; ^4 w mcasp->regs->XTDM = 0x00000003; // Slots 0,1 5 J4 ~; H3 M2 a7 o mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit4 d( @( R4 E) K! P/ B+ X7 C
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256 - M3 G2 O! k8 I4 K/ c5 ?' X" K' ?. [6 T5 d
mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN 0 Y' ]1 R$ {- E- n* C. V1 ? X- ?$ y; ~+ c& J mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT* ~9 l1 }3 g8 Z' l( e. q8 `- t
mcasp->regs->PFUNC = 0; // All MCASPs1 T) ]* D! [- D7 G! F0 |. \
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX18 c; m. c4 J4 H9 J/ h/ [
4 H6 A @# p0 \1 [) |. t3 N mcasp->regs->DITCTL = 0x00000000; // Not used " l$ ~! h# l3 j8 t& ~ mcasp->regs->DLBCTL = 0x00000000; // Not used ' G+ ]& V; [* E' x) z mcasp->regs->AMUTE = 0x00000000; // Not used ( |, X# ]" Z' z3 Q i6 E. h. ]) e9 o1 w- \6 C7 a" o
/* Starting sections of the McASP*/ ( e' g. D y( n' A mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 7 s8 Y* e0 X; g1 x
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); 8 r+ A' A% Q/ y mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; - |" \( b! `- r5 s& @ while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON ); 2 j6 V0 J! c" B, y3 F: z/ m# r# d9 h" T5 _7 ?) R% n
mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; 3 \7 }# P: |: a( t( I1 P: I8 J
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON ); ' f$ z4 n- V% V7 |/ p# u+ {( I mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; ; |# y/ X$ A: p- s* a0 w) k1 O) h3 t
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON ); ( h4 P; d4 m. X, U8 c( x% F1 _1 {( ~# k: Q( G2 P- r, f8 _5 u- Y
mcasp->regs->XSTAT = 0x0000ffff; + Y) Q% l) |4 N9 k, d mcasp->regs->RSTAT = 0x0000ffff; 1 Y: e! e/ M2 V* W; ]
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mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;. O8 ?/ n2 m/ e4 M( C# v
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );5 {- Z6 _& f3 w& r( {, k1 |% s
mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; $ l8 _; _. e- ^& ]5 O5 J while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );* P% B: I, E( s; E1 F! z5 z: l
0 k5 [; Q2 ` @# b /* Write a 0, so that no underrun occurs after releasing the state machine */8 I2 |$ V. i, X& Y+ Q# y# z* F
mcasp->regs->XBUF5 = 0;' Q8 C- h/ X! \1 h7 Q, q, Z3 N4 T
mcasp->regs->RBUF0 = 0; 6 l3 i7 R0 }3 W) h- I0 G+ t4 a # N2 d' s/ c5 O mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; " l8 {# @; ^$ s6 x# ~' P
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );. v: C3 e) @! b6 E/ s2 t
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; / R! Q$ V d4 u. e. H. ~2 M while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );0 C \8 s: p# q+ r4 D