标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 [打印本页] 作者: yusijiangchengm 时间: 2016-3-15 16:07 标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序: - z7 X8 ^* f$ G' ?main文件:9 |+ g1 z. M3 \. a% A# X
interrupt void interrupt4(void) % b& g3 c& m+ i1 ^' J6 W! B, G3 g; {{& y4 ^$ m4 x" O1 z, Q. X
Uint32 sample; 4 s$ x6 S4 S+ l/ e; q g# W 5 U7 ^' D0 N/ w# y sample = input_sample(); // read L + R samples from ADC . v* @; K2 i% b5 _: p2 o output_sample(sample); // write L + R samples to DAC 7 J( {* f1 Z3 c8 y F4 c; J return; - l O5 |: M7 m5 ~( e1 e p} , D# |+ U8 x$ {/ L: N / ~. C: y( s4 T* c# U9 M) eint main( void ) : T5 E1 k- b9 |0 f$ y8 Z- w/ @{6 `! d. N$ E# p/ g
/ }. S5 A3 U$ ~6 {. i/ [- s7 X; ^
/* Initialize BSL */ / B" [6 Z; c- E" s {+ B EVMC6747_init( ); 8 f w+ C3 W/ x! }2 ] /* Call evmc6747_intr function */$ D' F# b+ S' H2 a9 R: u
aic3106_init( );6 G8 b) p* n0 U, D3 r8 D
while(1); ' E: Z# K2 a# k8 G& y) X} 5 I9 N, j) g1 I 8 ?% R4 I/ |6 B* D: j, b/ b) G5 \) g; f* z
aic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题/ A7 u5 O$ H, ?# V
/* Initialize MCASP1 */ 5 f8 D1 t& n5 p# y+ O mcasp = &MCASP_MODULE_1;0 r) ~- T" V( w0 Q3 n+ H
mcasp->regs->GBLCTL = 0; // Reset7 s* Y: X% @3 V6 ^
mcasp->regs->RGBLCTL = 0; // Reset RX & V/ ~4 a3 t/ ^. j3 i mcasp->regs->XGBLCTL = 0; // Reset TX: ^ U- R' r0 k" y9 _& E+ t" ^$ s
mcasp->regs->PWRDEMU = 1; // Free-running" ^3 I7 J0 e1 g j1 O6 r d
// configure McASP0 receive registers0 e6 B" z N) D @ ~& _& j
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used7 L) k9 j8 I3 w) _: \) m
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus3 r, Q: R( C3 C( W) q
mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word& n/ A4 \6 ?' ? Q5 |9 l9 `5 ^
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side) # M2 l8 `+ T/ E `& }. w! ~2 `( } mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)& y# ^ A+ e' V
mcasp->regs->RTDM = 0x00000003; // Slots 0,1 - J3 M/ B) J5 @4 B mcasp->regs->RINTCTL = 0x00000000; // Not used: r t2 |9 z ]) Z. p" v5 Y& N
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256* O% r( [# t& p. ?& O
) ^/ o% w. |( c mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used 6 `1 C0 x. \$ y. u" f: N z3 W mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus $ k7 O/ K, L0 Z: A) O5 n- p mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word" ~! @3 @4 C$ |' P8 ~8 Q$ x- @! S. P
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16 7 j8 G" K) y8 X5 Q0 t" B, T mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK 3 p) B2 R+ ^5 }! u& N( H mcasp->regs->XTDM = 0x00000003; // Slots 0,1+ I7 \: m0 ?* O4 O) h0 a
mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit. C9 N2 Y# [: T' n
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256 * _/ D1 M* R' m! E' M1 J6 m 8 |1 f5 j% @8 j1 v- _! i4 L mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN ( e; f7 E7 d! n9 w h/ G# L mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT+ Q3 z! W7 t# R9 f z/ Z! i
mcasp->regs->PFUNC = 0; // All MCASPs . S3 z u G: u mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX13 P3 `- [; ?$ r( O1 n6 m; i# `
+ @' U% E, Z% @ Z7 U' o mcasp->regs->DITCTL = 0x00000000; // Not used 3 ~. Z- b. U8 L" n, j n mcasp->regs->DLBCTL = 0x00000000; // Not used ; ~+ H8 ^; x% `' B$ }( m3 ] mcasp->regs->AMUTE = 0x00000000; // Not used5 t. }& A; X% p$ C* J
/ N- \8 A9 b' W/* Starting sections of the McASP*/# C+ u7 F2 I! C$ [
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 3 g: r& G) z, F q8 D# t3 Y
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); # H2 \6 v. Q3 F& \& M2 f mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; 2 f4 \# v. `0 H7 w# k
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON ); ; k/ u/ L7 G& G+ l ( c( F" u) W9 E2 \/ @' L mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; " t0 C. k. m1 x; `, s2 `5 j
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON ); \8 d$ y- g% X) M. U, }* D9 K! Z" G mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; % O2 j) W# W' t5 s! p- L
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON ); , S, t5 P) I; M % I6 {/ F9 U5 \ mcasp->regs->XSTAT = 0x0000ffff; 3 G2 M! X. [. I" e
mcasp->regs->RSTAT = 0x0000ffff; # z6 R6 n2 q$ }# E( E6 z0 ^2 S6 O- J/ H! L( K* r9 _1 x3 p# r
mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON; # X' w! z. S9 }% h4 H while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON ); & J6 {8 \6 q1 P mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; 3 d" Z0 o9 e4 k% l4 w$ t5 e while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );8 d: [' E8 p$ F: P( W+ d% B- A9 p+ y
: F5 A# s% N% c8 i% u9 p. a2 J /* Write a 0, so that no underrun occurs after releasing the state machine */ # |0 i" y a! u M7 ~2 P- G1 @3 P mcasp->regs->XBUF5 = 0; $ C- u; i& [7 y4 E! D2 C* G mcasp->regs->RBUF0 = 0;6 V4 G, @) E" M2 D6 ]% z- y7 Y