标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 [打印本页] 作者: yusijiangchengm 时间: 2016-3-15 16:07 标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 C6747和C6748感觉差不多，我想实现McASP发送中断方式控制音频信号，在轮询的例程基础上改的，轮询程序可以实现，但是中断一直实现不了，也找不到错误，求大神帮忙！下边是主要程序： : A8 o/ M" t1 Z" ~' emain文件：5 ?5 I; \% }5 D3 k7 w8 D
interrupt void interrupt4(void) ) _( v6 p( H2 {' _. U; Y2 b) U+ q
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Uint32 sample;; F, u. B- d" s( U
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sample = input_sample(); // read L + R samples from ADC7 g" O" h& g4 n* a6 E- i6 j5 o
output_sample(sample); // write L + R samples to DAC - u1 S6 y" _0 ?( f: q1 l% O* J8 c6 c
return; ! F {/ r* \; W& l( s} * L" d! }) }& ^5 |" F( ^ 2 b r! g9 M0 S A! |int main( void ) 8 q9 h% O$ h `: m{" h% s, Y! `1 D. E$ d
' `# A) I2 r( d. z# Y/ }& s /* Initialize BSL */ - H5 h0 b, l+ }7 ] EVMC6747_init( );8 b6 `6 ^1 }+ U' O2 j
/* Call evmc6747_intr function */ - c1 T/ x; l, f- D# Y0 ^ aic3106_init( ); 7 W/ z, N) j/ e$ l& C3 W; p while(1);+ C# {0 y$ Q" C% t
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6 {2 F6 ?# `7 \, b( r" Caic3106_init文件的一部分，McASP配置部分，采用内部时钟，I2S方式，同步传输。音频芯片的配置应该没问题 9 Y$ n# e, D; G$ i: [. H/ ~) D2 E9 X, x7 e' e/* Initialize MCASP1 */1 D: F1 A! ~8 \: Z0 l4 N' Q: j: H7 i
mcasp = &MCASP_MODULE_1;# Z9 p, b2 a3 n) S ^& k" u1 i8 T
mcasp->regs->GBLCTL = 0; // Reset! P/ r0 O3 ]: q* ?% v
mcasp->regs->RGBLCTL = 0; // Reset RX 7 h5 h8 s( \5 F) y4 B# T- n& U' z mcasp->regs->XGBLCTL = 0; // Reset TX- ? z3 Q! b% h
mcasp->regs->PWRDEMU = 1; // Free-running9 X% B- p1 m4 F6 W; i8 g2 ^) ]! w; @
// configure McASP0 receive registers3 j4 P4 \( K1 o5 R' a/ W2 A, C
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used' |3 K0 o3 g! h+ H
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus 6 X8 I% _; o o mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word+ T2 E$ ]( y$ X6 C# n# a9 i5 t# N! Y
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)' I) d. Z5 ]" e! F& b
mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side) ; [, T# I! {; V/ O, b mcasp->regs->RTDM = 0x00000003; // Slots 0,1: A- `& m- M; @7 l; T
mcasp->regs->RINTCTL = 0x00000000; // Not used N0 o( q% J1 Y( |
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-2565 T# x' ]" }2 x7 @& h
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mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used % n9 W5 M" h8 U- A3 G mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus A6 v: x5 i" l9 r6 ~
mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word% L0 S* ?' c5 Y6 W9 h* D1 p+ H
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16& g7 L% o2 k" o/ Y
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK # n2 q% M/ ]* r' }6 E2 U- w mcasp->regs->XTDM = 0x00000003; // Slots 0,1 ; M& w0 [) a9 [/ m9 [8 Q mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit 9 I+ A0 B$ I# c mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256 8 u- d, x B" [1 ?- ~2 c' m9 h' f* Q/ y
mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN ! X m9 Q1 K+ ]4 m mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT) ?6 u* }. _4 t8 f$ K4 m4 r
mcasp->regs->PFUNC = 0; // All MCASPs9 q& t& | I* J8 R* _
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1 ! L5 l) R9 e5 |" x; s J2 y/ n. t4 c2 w: g# X' S
mcasp->regs->DITCTL = 0x00000000; // Not used/ m: h/ m& m* V
mcasp->regs->DLBCTL = 0x00000000; // Not used; J2 ?6 Y8 Z' V7 |$ E
mcasp->regs->AMUTE = 0x00000000; // Not used ) F z3 S' _3 h( ?, D( O* _8 p; I" _! ?& h7 b
/* Starting sections of the McASP*/ D8 Y1 U: k( J* R, R# R" v! D
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 0 u& c: ^% f* V7 `1 p
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); 2 X2 ~' y R: [0 j2 {+ B: b1 R9 T mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; 3 O1 c/ E" q! Z% T) R, e7 w& \ while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );+ S. R8 L! u; C2 J. Z
! q _5 B0 x4 m. W" R3 ~ mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; , g$ V, `# Q9 ]" V( x: L9 ^8 Z
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );9 q4 l8 f" e3 L9 n, N* N6 W
mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; 1 B6 b$ z! O; }* _0 Y) L
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );/ q2 d0 G) d5 d3 d2 x; { L
. Y. s' O, r3 Y1 x5 q8 h mcasp->regs->XSTAT = 0x0000ffff; ! o7 Z3 v' l# x+ W. m
mcasp->regs->RSTAT = 0x0000ffff; + D6 P2 X; q3 [
* I4 h8 a7 b, J mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON; ) O9 {+ w, K0 f' W+ g* f4 K+ r! d while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON ); 8 x* _, L& e# q1 x' _2 I2 ]# { mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; 3 j1 }1 q [2 ^8 ^9 [: k
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );. l. n1 `: q+ @! O' W
' m" ]. J2 }; [% } /* Write a 0, so that no underrun occurs after releasing the state machine */ + w) \1 U, I5 m9 p9 O mcasp->regs->XBUF5 = 0; 8 M+ @( E, }/ m! w+ o! A( i mcasp->regs->RBUF0 = 0;# n5 F: f4 y! j$ e: k; B. y# _
7 k0 c; F6 g# R0 x/ i mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; 0 d0 S$ g3 Q. }7 i! h$ Q while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );7 X! }$ D2 R" \+ h4 Z4 T
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; & o$ Z9 ?% q3 |+ a7 _) D
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON ); : o ~; Y# f* Y( R' G/ f) c6 x. _$ @5 e
mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; ! j. t9 o* w( q6 J% m' `( Z3 }0 l
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );, e3 ?% r" D* f; {* N* A
mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; ( ~# O! ?# [% z; e9 W* j
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );0 l3 Y& c' W4 K" }- G