标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 [打印本页] 作者: yusijiangchengm 时间: 2016-3-15 16:07 标题: C6747利用McASP发送中断方式完成音频输入信号的直接输出 C6747和C6748感觉差不多，我想实现McASP发送中断方式控制音频信号，在轮询的例程基础上改的，轮询程序可以实现，但是中断一直实现不了，也找不到错误，求大神帮忙！下边是主要程序： r% L6 w2 \4 E9 v! F
main文件：; G7 P0 f, Y$ Y# q0 U
interrupt void interrupt4(void) g; v! m& s& r8 D( x% e{ : S$ `+ u$ c3 s, y( O/ \4 i# R5 [ Uint32 sample; & c! l/ `) e5 P. C+ H \/ Z" n- f! u) O sample = input_sample(); // read L + R samples from ADC + V' X+ p; X$ x q$ A. F output_sample(sample); // write L + R samples to DAC " p) w" v$ p: X( Z2 ?
return; ; C( S2 r+ B2 G+ E: I7 u}! Z, ?2 U" }) U9 O8 o
, V3 \+ K# i/ H
int main( void )4 f, j+ [9 ]! D# \5 x
{7 _3 E* B2 K# V& Q/ B
, R! g5 j3 b3 z
/* Initialize BSL */ ) N; R7 O; ?" Z' ]* f# r/ G EVMC6747_init( );: [& }4 |% P& n$ D, A: u
/* Call evmc6747_intr function */ / F. ^9 B( l9 D aic3106_init( ); % L8 E: F4 T" A2 b0 Z3 p5 p while(1);( y5 S* t7 ]8 d* X6 z# m$ m
}% f+ ?5 ^ z; T; d, a
8 J3 |& V: Z" M' i
3 `7 q' D; z* K: M
aic3106_init文件的一部分，McASP配置部分，采用内部时钟，I2S方式，同步传输。音频芯片的配置应该没问题 `+ \1 z5 N& E& c3 I/* Initialize MCASP1 */ 3 } A# \0 [5 W0 G mcasp = &MCASP_MODULE_1; , U9 u9 x1 L7 B2 z mcasp->regs->GBLCTL = 0; // Reset ) F2 ~3 q+ H" K/ _/ { mcasp->regs->RGBLCTL = 0; // Reset RX* s" L# G7 t" ]" r7 E
mcasp->regs->XGBLCTL = 0; // Reset TX+ I- _4 e: @; K k+ I8 f7 h7 p
mcasp->regs->PWRDEMU = 1; // Free-running 8 \! Q/ u8 @4 `& m // configure McASP0 receive registers* U9 P4 L/ ~ \ Q: f& V n: d% }
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used) l( D& s5 o/ K
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus " k; R. |$ {/ O6 q mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word" G! P; c( z' z+ Y( G
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side) 5 U* D" ? c6 T, }0 m mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)9 z- I, N( r5 x
mcasp->regs->RTDM = 0x00000003; // Slots 0,15 a; x* j: }2 z+ Q' A
mcasp->regs->RINTCTL = 0x00000000; // Not used6 i2 J* z% R, A: ]
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-2561 L" l K( B0 k, o- b4 W' @
# V. U1 e$ z% p0 y: P; n
mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used 4 g6 X+ `& q2 h* v mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus4 B" P! q2 R/ H3 Q- e
mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word e; s9 g$ x8 O' Y. p0 P mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16 6 h6 P @+ j [4 R B mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK 3 m, u, D7 O3 E, w* \$ L- n! ` mcasp->regs->XTDM = 0x00000003; // Slots 0,1 : s# e$ H) ~" S: P# i! M0 @ mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit4 N4 ]. B0 G* Y$ p) F
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256. f' F5 h. G2 @8 a& T! S
: A/ V: \: A, P# K) I: ^" z mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN8 V. C8 ]& T( N/ ~5 J
mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT ( ]9 b; o% _) ^ mcasp->regs->PFUNC = 0; // All MCASPs 9 G; U2 b) C2 \: l+ j1 W$ q+ y+ Z0 P7 l mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX19 E n% Q! ?" g" {; `, }% G0 N
8 p6 r S3 W; k2 }, Q mcasp->regs->DITCTL = 0x00000000; // Not used: F. W. Q% z2 @: I
mcasp->regs->DLBCTL = 0x00000000; // Not used5 z( I+ N' P" k" @7 ]
mcasp->regs->AMUTE = 0x00000000; // Not used: B( \/ l z7 |( {+ I9 U- p0 y
+ b8 }! q8 @" e0 u' X% _- m/* Starting sections of the McASP*/9 N9 Z1 i: c, K/ R- x
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; $ v/ N. l8 Y& n B* ^6 M6 ] while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); 1 s- E. g7 C9 ~+ J' K" \% n% G
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; 3 b+ F) }! `; A5 c" d7 } while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );% D2 e/ ] \ k S& t! o
2 e, k) F4 u9 _# K2 d! p mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; / |4 n9 q7 F) h: o! n2 g3 Y while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON ); " Y" M& a* i# f1 y mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; 3 {+ k1 ?. e( x while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON ); ( X) [1 X+ B! `) e ' f: {2 Y7 Q0 U6 X" I mcasp->regs->XSTAT = 0x0000ffff; 7 d$ [$ d. u+ C7 s
mcasp->regs->RSTAT = 0x0000ffff; 8 v) r8 D! G" g7 S" \( A! u, d2 ?. x8 Z# b
mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;4 R! d! ` o) C' g$ z. Y- P2 t. L
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON ); ' F% V, Q. Y' ^; h: Q mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; : B" s7 ~$ e& W& Q! L3 R' ]
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );% \9 m, z+ Z q9 I1 L
& s% n; s7 l8 t7 Y /* Write a 0, so that no underrun occurs after releasing the state machine */# a& h; Y' x! N$ ^3 w
mcasp->regs->XBUF5 = 0; 1 N3 f: ]7 e6 D! F! @) [/ v mcasp->regs->RBUF0 = 0;- v* S: A2 h1 W3 v/ I1 R6 Q7 x
: w/ @! c7 \8 g" y5 ]' }0 h5 _7 p( P
mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; 6 m" @, W/ S3 v( A! B$ N4 g( v while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );9 t \! y m. J4 w# a9 d( j
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; ; K Y' l/ X) W; Y* ]7 Z
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON ); . m" b- Z3 n. ~8 w* l% {% w, B" q7 r" Z" B# g
mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; - }1 C. _5 {7 n8 i8 {# M
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON ); 5 y! ^+ D8 \8 m5 T+ j& | mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; % l6 E& S. v$ Z* I- M while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON ); , i a6 K) `" A) ~7 K0 h ) b/ N5 | L) w0 \/ E% f" P7 @& x CSR = 0x0000;+ v8 W6 k: R& i! r4 C9 A& x
INTC_INTMUX1 = 0x3d;& e9 v, x4 s4 n" b2 ^+ G$ R7 \$ o
ISTP = (unsigned int)vectors; 5 A. f$ M" g9 D2 t/ J+ e% E4 c ICR = 0xFFF0; . l) L1 C2 n/ h5 ^
IER |= 0x12; 1 u5 U( }7 W7 L: c/ C: E3 y
CSR |= 0x01; ' |5 Z* W' U* G6 R5 M2 L- T5 K2 R8 e: ]