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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
( ?+ _& F* c5 Lmain文件:9 I' u/ ?/ O" s2 I6 l ], L
interrupt void interrupt4(void)
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* A5 ^& g! {' T3 h% _ Uint32 sample;
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sample = input_sample(); // read L + R samples from ADC2 n7 q2 A+ h, N" L8 q
output_sample(sample); // write L + R samples to DAC
! @8 R; M- ?8 I% h$ a, s return;
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. M- ]1 @5 y* \2 b3 Hint main( void )
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/* Initialize BSL */
7 V* N, ^7 B3 U( y+ y4 D" D EVMC6747_init( ); a+ N& M4 {/ Y0 U1 c8 T
/* Call evmc6747_intr function */
% R5 Y3 q0 m- ~7 C aic3106_init( );
R! }! U- Z" F& ] while(1);( X, Y% h4 E+ W, Z! b
}
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' p; D0 s3 N q, r; @$ U) X5 t7 Yaic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题
' T8 Z1 m5 q4 W; ?/* Initialize MCASP1 */# Q) \8 R1 |9 ^. E0 z' ~
mcasp = &MCASP_MODULE_1;) O1 B1 Q+ G/ j( N" j, k& `
mcasp->regs->GBLCTL = 0; // Reset# q2 A, ]$ g1 P2 I/ m
mcasp->regs->RGBLCTL = 0; // Reset RX: T( w: y6 ?$ a
mcasp->regs->XGBLCTL = 0; // Reset TX
# I* m) G9 L9 k) x: `1 v5 E$ X! K mcasp->regs->PWRDEMU = 1; // Free-running. y: K- \+ z/ u4 r; t- B6 D. [% g
// configure McASP0 receive registers
% G6 }% X( i# D3 M0 d3 }8 b mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used1 ]2 ?& c- Z/ l+ K. K
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus: x$ a3 W% s! U8 q! I
mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word
" \% z( g. s& Z$ } mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
. ?# h8 l8 {$ z5 I7 p mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side). T! X9 `: w7 q% y' Y. ?
mcasp->regs->RTDM = 0x00000003; // Slots 0,1# c$ |7 i4 R) |. \0 W/ f
mcasp->regs->RINTCTL = 0x00000000; // Not used
( Q1 t9 u, O, M7 I* L mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-2567 t/ F+ c3 e6 j( c" J- I; s3 Q
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mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used
) T' R+ y1 [$ p) F mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus3 J, p. r( ?7 Y% h
mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word
6 D. r5 I( ~7 P% K0 c4 v. e h mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16
: R1 d. A; d+ C6 U mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK- b" h" ~, N4 j7 m8 a; w1 J% o
mcasp->regs->XTDM = 0x00000003; // Slots 0,1
5 _: _$ `8 I4 t0 ] mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit# N7 }0 u1 B7 r
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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9 j5 Q7 Z( ~8 Y/ \" O8 m# [ mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN
+ y7 a$ e5 c! O( n+ P mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT1 ~" p. J* V5 v2 g1 v
mcasp->regs->PFUNC = 0; // All MCASPs7 S' d, D0 e" e/ e" F
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1
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$ M# s6 A) I& {: f* ~$ _9 R0 T mcasp->regs->DITCTL = 0x00000000; // Not used
( f9 F/ B# R# l: } mcasp->regs->DLBCTL = 0x00000000; // Not used
) u4 B4 ]' n# T# p, E6 @6 N mcasp->regs->AMUTE = 0x00000000; // Not used3 j3 @) V4 V0 m" S$ A' s
; K* Y5 w8 o* F7 W6 v# P* j) ?/* Starting sections of the McASP*/
( a" o6 g/ ~- J' ?9 F mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 4 v& h# p3 t! l+ g
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); ; v% J3 \% r* U4 }
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON;
7 d$ v$ ~+ y& l/ k( m8 N. c1 Q P+ f while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );1 x0 ?7 ~ A+ l3 k
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mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON;
, z4 w, D5 ]3 G7 j b- d6 p' E while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );. m" X3 k. N" Q/ M1 X% M
mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON;
. A- v' {' E/ X k while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );
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* V$ Y5 A& l+ o7 n mcasp->regs->XSTAT = 0x0000ffff; $ y- {5 g% b" m/ v
mcasp->regs->RSTAT = 0x0000ffff; $ q+ T* b2 G$ S
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mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;2 @6 f0 H5 L4 x+ B) K0 W; L# |
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );
: n0 |% x2 R5 _) t; G$ ?8 y) h mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON;
# F5 L# E8 Y7 W while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );! f/ ]6 }9 B! X- t$ ]
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/* Write a 0, so that no underrun occurs after releasing the state machine */8 ?$ ^( a; P8 T) D; ~! j9 \
mcasp->regs->XBUF5 = 0;( i! l+ k4 U5 x. F7 m% d/ J: f7 |2 @: b; C
mcasp->regs->RBUF0 = 0;. l- Q# ] H% i7 C: U+ V* B
8 U% m2 s5 k0 R7 Q; h5 K* A* a p; S mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON;
5 L9 [* v/ n3 V, p: M9 P while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
6 \5 U7 m: O7 c mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON;
% Z; W) K j C& |& _/ \8 A while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );' L. g) u9 ?: \
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mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON;
8 A1 L( ~* P/ ^5 M5 z while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );1 p3 c- T, B ?# J+ }
mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; 6 o* U! }+ A+ a" O" W7 @
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );3 r: G7 r5 k" q+ t: J
1 [' c" D) Z! N& U CSR = 0x0000;
& O" K' y5 r8 G1 A) W" ` q" K INTC_INTMUX1 = 0x3d;/ Q+ S8 P5 K& Q* s& `2 }& x
ISTP = (unsigned int)vectors;
& n7 o( l4 ~! }# _. j ICR = 0xFFF0;
, c8 ?( H) C9 f IER |= 0x12; . h' N7 K) ?" ]& ~4 m$ b
CSR |= 0x01;
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还有就是两个输入输出函数:0 J9 N! z6 Q" d
void output_sample(Int32 out_data): t1 |0 U' E/ j0 S, }# f8 f* J
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AIC31_data.uint = out_data; 1 `. x( M9 P' M7 S, \/ z7 S6 m
MCASP1_XBUF5_32BIT = AIC31_data.uint;5 @" g; {* n- s! Y2 V- ?
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Int32 input_sample(void)2 v5 q! W% a3 U) p5 M8 @
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AIC31_data.uint = MCASP1_RBUF0_32BIT;8 W2 @) H6 R) t! |: x( w
return (AIC31_data.uint);
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