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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
/ y" J# ^# |6 e h4 t2 O) |main文件:
9 I1 X7 x: m! {, p' w( c" _interrupt void interrupt4(void)
% A, z5 y: F0 d{
/ \6 K2 q6 C) N! N Uint32 sample;
% A/ U# H& P3 }; `9 Q: ?% T
# N1 W* r. U/ a& Z% j/ C sample = input_sample(); // read L + R samples from ADC
$ h! G7 y5 V A6 O6 V1 q output_sample(sample); // write L + R samples to DAC
3 ]' \9 l* W0 W: ] return;$ z2 s, l- \* X' z
}
9 E0 r% c6 v" _" J# [
8 q, n( _) w, }6 e. Mint main( void )" c( k9 m1 M$ Z8 ]
{% e$ Z1 s: F1 } e
9 u/ h* d! u6 _ /* Initialize BSL */' |, m6 }* h( l7 \/ M
EVMC6747_init( );. H: i6 q& t1 f+ c. a2 l
/* Call evmc6747_intr function */
) U2 a6 b$ v- ^+ R: D, H aic3106_init( );
9 i. [" O _) b* y3 I9 f while(1);
4 L8 B% G$ \. b9 g9 Y) j}- ~8 U+ Z8 l2 {. t. C) ^
$ ~1 v- ~* L& \4 b
7 D. p$ i6 P) R* H' Waic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题
7 }' q7 g$ U" X( \/* Initialize MCASP1 */
, g0 f% R8 w3 D! _; }1 x mcasp = &MCASP_MODULE_1;
1 v. h9 {$ [. s% v* ]3 w mcasp->regs->GBLCTL = 0; // Reset) q. o4 E8 M/ {$ l: w4 W) G
mcasp->regs->RGBLCTL = 0; // Reset RX
* o# z1 S& \- e: N3 J8 G mcasp->regs->XGBLCTL = 0; // Reset TX/ f8 A$ K+ r8 I1 N/ ~8 K
mcasp->regs->PWRDEMU = 1; // Free-running
+ |3 Z4 W' u2 f2 _ // configure McASP0 receive registers$ l, ?# E6 U/ \& u" Z7 b# q% S
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used
4 T& @1 A& @0 I# d' J mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
$ i4 G6 T! V6 g8 o mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word
2 g1 w4 V+ F* D R/ g mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
+ ?& t6 x" s1 x mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)
4 h, p& N9 \! x% f- r8 H7 A mcasp->regs->RTDM = 0x00000003; // Slots 0,1( _) B5 ]& d, O+ B
mcasp->regs->RINTCTL = 0x00000000; // Not used
n9 p# _1 c% }& x% W mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256' Y3 }! N! M3 d
* i9 g) \7 @# t; M mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used
, `! U9 x) l6 t! T mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus: V4 p" L O7 Z' [; \
mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word/ c6 @* {/ J4 n$ m
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16( b: s. o( h$ n& k7 ^& x) [1 N6 \
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK/ ?+ e+ g9 h/ J% I
mcasp->regs->XTDM = 0x00000003; // Slots 0,1$ A6 C! k' S4 ^8 F- B3 Y
mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit2 o3 C9 L1 K$ B
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256. M) C2 X8 l6 J F
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mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN5 Q* Z9 O: \, u! o e4 C
mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT
9 ^: v( Q1 b( N! j8 }. t2 B mcasp->regs->PFUNC = 0; // All MCASPs
Z: p; V8 s2 X5 C5 s% f2 A0 m mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1
, m( a0 `# L& B# v5 Z$ k
5 y% Z% I" J/ p7 Z+ O; g0 n mcasp->regs->DITCTL = 0x00000000; // Not used& }4 k* t# W1 _0 L9 t
mcasp->regs->DLBCTL = 0x00000000; // Not used
' L& | s3 w ?' L- c mcasp->regs->AMUTE = 0x00000000; // Not used
. p; h: s/ b% O2 Z
3 o% Z' C6 r" Q+ _/* Starting sections of the McASP*/, |; N; K0 A/ Z. C0 j
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 9 h6 c& C% K8 d) k5 D
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); " j# ^+ r6 g$ F9 [
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON;
, }5 F9 K& Y# B while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );
; ?$ K! |6 X3 d! ~6 @: M! p0 \8 u# G+ B( x; S8 |* h* s
mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; : u% s7 P" N5 }1 Q& m6 d, E
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );
* g. v9 ~ y$ p# O5 Z' `: P, n# z mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON;
4 ?( W/ o! Q7 V% f3 N while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );# }7 C9 a b" n1 D' P, E" i0 z
4 {0 z g4 C5 f( d1 [ mcasp->regs->XSTAT = 0x0000ffff; 8 S& X j' i- t6 N, q5 X7 v* O
mcasp->regs->RSTAT = 0x0000ffff;
+ S1 d: G( Q! z+ x/ ^
. l# n5 g. E3 L0 z# t, b mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;
0 O2 Y0 c4 C0 B$ L while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );
7 w) T6 x( v5 m" C2 u2 M mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON;
. R- j3 }! A8 k$ Y+ T* {; \$ d while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );
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/* Write a 0, so that no underrun occurs after releasing the state machine */* ^: Q1 A3 I' G
mcasp->regs->XBUF5 = 0;6 E0 `" l' E2 ]" q/ X7 [ D
mcasp->regs->RBUF0 = 0;
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mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON;
: C9 u* w1 @. d2 X# {: k$ o+ Y while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
% m+ p1 N& j# u1 r mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; 9 M; ^' W8 v' D; C5 \6 p6 R. u
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );
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8 ~" \3 @, n; m5 o; n mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON;
! [( n! K/ ~/ P while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );# U; O: G, {& k9 \- T
mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; % }( c( Q+ Q8 X2 d2 n( P
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );; P" z( b# z. S/ @& p8 W
( A- ^) Y) F4 d. u CSR = 0x0000;
* }. R$ f( X6 ]: B a& K, h, r9 ? INTC_INTMUX1 = 0x3d;4 f- n/ ?$ ^( S
ISTP = (unsigned int)vectors;
8 `+ w1 L3 S& R- T. c ICR = 0xFFF0;
( \0 `- B% F5 l7 Q7 ` IER |= 0x12; 4 `$ d5 _* S, \9 [. D
CSR |= 0x01; 4 d1 @0 e: F! l: S& X
# x8 H" ^: B+ t( Y$ \$ H3 S/ P, ^5 ]
1 B Y$ D( |, ]& A
还有就是两个输入输出函数:6 o0 n* q( A s9 U
void output_sample(Int32 out_data)
* a$ w: C/ `1 F6 v0 w/ u9 \{
. p) F( _- c8 v R AIC31_data.uint = out_data; ) L i9 Y4 b2 e/ K9 G. k
MCASP1_XBUF5_32BIT = AIC31_data.uint;; E& @1 @- `/ |% H# t
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8 |! g* b: B* y: J V& i$ b. D, sInt32 input_sample(void)! y7 Q1 T& ?9 w
{
) B1 l3 @, \, _3 j* D* c/ G( g% D AIC31_data.uint = MCASP1_RBUF0_32BIT;+ [* ^. r5 V: `" e8 H; S
return (AIC31_data.uint);4 `7 \$ W& N! c
}% M2 B0 p+ U7 Y9 z4 y, _
' V1 Y: q+ } v, }5 i2 W r
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