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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
6 q6 n) g7 F; u8 u5 C7 c7 H( w4 imain文件:
1 W0 z, p, M3 Z2 |interrupt void interrupt4(void) 2 {: ]( ^* z1 ~. d# |- v; C0 u4 b) O
{
2 |3 y b2 y4 J& q' w* m5 g6 ` Uint32 sample;% e; ^; ]. _5 F, B% O% s
+ |; c5 }. _- P7 g( t sample = input_sample(); // read L + R samples from ADC
7 h) ^0 L$ g( A output_sample(sample); // write L + R samples to DAC
4 Q/ K! d+ T) p' N: g return;5 [/ D4 V( F% N8 r* V8 k5 G
}
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9 _* `! P: o8 O1 ~# f" W, b, Dint main( void )
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/* Initialize BSL */
! k3 g% R' A" ^: w EVMC6747_init( );# U) h' w4 u' F3 w
/* Call evmc6747_intr function */
3 z5 u" B' n. y, S aic3106_init( );
$ a: G! P/ C3 `1 {- {1 k$ z while(1);4 d) [. Q" A O6 n. r. |! u
}
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3 L0 u, C% s: E6 faic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题1 r* J G8 }: Q) T% g* l! R
/* Initialize MCASP1 */% d8 J. r: z5 Z0 `" A
mcasp = &MCASP_MODULE_1;
6 v) Y8 r) j9 @0 j% @* ^9 B& @" D5 n mcasp->regs->GBLCTL = 0; // Reset' S4 b$ w8 {+ U# ]: ^; E2 j
mcasp->regs->RGBLCTL = 0; // Reset RX
( U+ v/ F1 C3 {. V mcasp->regs->XGBLCTL = 0; // Reset TX
7 s9 W z2 n2 C9 k mcasp->regs->PWRDEMU = 1; // Free-running2 j; V& f S% g$ p6 B( F1 |
// configure McASP0 receive registers
8 d$ _. ]: J) j+ y mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used
6 `# w# w$ r# a8 c, p mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
8 e8 I$ \2 R S5 i, m mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word0 z! {4 {/ G+ F
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
$ N/ s8 `) C( |! l1 }4 T mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)( F( n& V# y- z2 `; @+ g
mcasp->regs->RTDM = 0x00000003; // Slots 0,1 l2 r& ]4 p! Q9 J; r5 L/ x/ `
mcasp->regs->RINTCTL = 0x00000000; // Not used
* R2 s5 j) o! \ mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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% d) z, ]9 G2 ]% n) Q4 X mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used
. B/ a; c+ J) c8 S% o" D mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
; m4 D5 s/ y. ~8 e mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word8 O% @$ @( w7 C+ E
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16/ _1 x8 X' f6 j t( ^+ Y. S
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK* }# h; `. ~' x8 Q! |$ a* F
mcasp->regs->XTDM = 0x00000003; // Slots 0,1
R1 t, E6 R c4 L9 i mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit
8 ]8 [2 h* Q! j/ G" b2 k mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256% Y, S! ?7 v# ^$ i' J! @6 @0 P
1 Y0 E( Q4 I4 A* Q mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN( M& g* \/ F4 v# L% q( t
mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT9 D3 H- n4 A% k; S0 I
mcasp->regs->PFUNC = 0; // All MCASPs
$ k' ~ P+ e7 v7 x$ h$ s- G mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1; s+ V* a6 D( s* m+ x: q
% `7 t. }' ^1 K mcasp->regs->DITCTL = 0x00000000; // Not used
1 V7 z6 X! i; s8 U9 {6 }4 F mcasp->regs->DLBCTL = 0x00000000; // Not used
' C s# Z5 z6 N: ? mcasp->regs->AMUTE = 0x00000000; // Not used. V# T/ l( b$ Z8 y. |& e
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/* Starting sections of the McASP*/
9 K! l1 ?9 q/ j/ N mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON;
9 [& W$ G0 P: K2 ^3 Z while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); ( g5 D7 A4 ?; T' E# c& P1 f& @
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON;
/ }2 Y7 V% f& l while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );
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2 N3 b0 ]4 H8 n mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; $ T* ^; Y* ^4 N+ W
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );. ~* K! A& n: t
mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON;
& t1 y$ T' M9 W6 k while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );5 `8 J N' s. v- }! y. K
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mcasp->regs->XSTAT = 0x0000ffff;
, D9 y, I, L0 q6 ^ mcasp->regs->RSTAT = 0x0000ffff; # Y9 W+ [2 z8 i" ^7 K. u
' W6 E4 i7 Y0 X5 c) x" H2 B) ~ mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON; [4 e: l$ q* A; I. H$ U
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );8 z- p0 }( v; ?7 ^+ j
mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON;
, U3 O# o/ n4 X6 t. x. Y' n6 k while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );
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/* Write a 0, so that no underrun occurs after releasing the state machine */' c6 z2 d6 d% d
mcasp->regs->XBUF5 = 0;
7 V2 g3 P6 H7 X8 a! a mcasp->regs->RBUF0 = 0;
& d. F6 Z$ B# [5 ~
! s& `/ x+ {% N! t% q3 {* t3 \ mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; 5 i/ B3 c# v; a2 |1 Z8 N! S, p
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
, J+ x, N7 z2 t' u* e mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; ( i8 B" }- ~9 ~0 `4 x U. ~
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );. G+ H# Y9 G% y3 e( i$ M8 w0 G9 f7 p
h R2 y* z' O; W mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; / ]; Q" G9 k! l- M
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );- p/ ]" V0 `1 ~' W. q
mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON;
+ @- s& X2 j9 W6 u. ?: t while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );! ] ^* n2 Y* a. d
$ y2 Y% h8 h" |: w9 |) d: ~ CSR = 0x0000;( j8 z p) o p/ K6 T# C7 R
INTC_INTMUX1 = 0x3d;+ L$ R; E% i: d7 r; ?& M8 K
ISTP = (unsigned int)vectors;! M/ W2 ^0 O- `9 B# C5 T, x
ICR = 0xFFF0;
9 [" V- Q, S5 @- f4 P z IER |= 0x12;
1 H& C& Z* _2 g- G& [ CSR |= 0x01; 2 q. m* W& w h% M, U% e0 a- u
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5 v4 l l% W3 w a还有就是两个输入输出函数:& b# H B1 k, b
void output_sample(Int32 out_data)
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0 K# J2 F: f& @, O" a" |2 i AIC31_data.uint = out_data;
) v2 f& F9 C3 v0 D6 K- e2 z. R MCASP1_XBUF5_32BIT = AIC31_data.uint;
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% x: u3 B: O, x) y7 s# u4 {Int32 input_sample(void) f* X y$ @) @0 G' U1 O2 `% [6 U+ P" Q
{
" W4 v k, S5 C% n- N5 y( U" f' y AIC31_data.uint = MCASP1_RBUF0_32BIT;7 k" }& c" G5 z" Y. Q6 r9 w- f/ w
return (AIC31_data.uint);
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