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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:' K4 t# ^7 y. E& j
main文件:' \% t7 c# Q5 S# T
interrupt void interrupt4(void)
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Uint32 sample;
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sample = input_sample(); // read L + R samples from ADC
0 i8 [# {5 U1 p+ Y output_sample(sample); // write L + R samples to DAC
/ @3 [) d# M0 b7 x' `8 G return;* j" I% @" n: n- N
}
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int main( void )4 P* d1 i* n! v) b
{
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/* Initialize BSL */
5 ~9 D, f1 u) s" |% W" R EVMC6747_init( );
& O7 ]% H* n- W6 p* ~1 N2 F /* Call evmc6747_intr function */
! u: Y$ K/ l9 u) G0 } aic3106_init( );3 o j; @7 J- Y; z* U) N* Z# T8 e7 O
while(1);
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1 B) c+ e/ D4 G5 I n+ faic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题
5 a: ]( ^) X% E2 B7 I' N/* Initialize MCASP1 */
* ^% a/ s6 }0 w mcasp = &MCASP_MODULE_1;: h. s. {' G5 |% {0 V/ K3 O
mcasp->regs->GBLCTL = 0; // Reset
5 p2 [$ j% q. i' s& P6 l ^ mcasp->regs->RGBLCTL = 0; // Reset RX* e9 u- l1 S6 E: J9 b; y7 G
mcasp->regs->XGBLCTL = 0; // Reset TX
# M K0 q+ y+ g- G mcasp->regs->PWRDEMU = 1; // Free-running7 G( `& h0 H2 C8 z% [7 d
// configure McASP0 receive registers0 \2 w% w4 Y+ ~3 \9 T) h5 L$ F4 B: }
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used* Y; H0 v9 g/ ^! C( P) c
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus9 t7 z5 B' V4 T: C0 o" e7 K" |" y; V) V
mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word
9 c$ |1 v- H8 T5 Q/ m4 q0 B4 c2 z mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
$ Q2 h/ E2 D$ _2 y mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)
9 e: N5 c8 x' M: o# y1 O, u mcasp->regs->RTDM = 0x00000003; // Slots 0,16 K' y" M. y( a/ J! N+ C0 s q
mcasp->regs->RINTCTL = 0x00000000; // Not used
2 }: {: B. t$ P. [ mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256! a% D- K' }# [/ c; a, D( s9 b2 [
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mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used
" D9 c1 `1 R; s% p5 \ mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
+ \+ x) C$ C/ e* m+ x4 a% O mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word- J. v- s! u' a6 Q5 H
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16
- e! T& |0 I5 \; f mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK1 V" c/ u& i# [( l. L
mcasp->regs->XTDM = 0x00000003; // Slots 0,1& h$ n$ v1 [; a3 |& ]4 l1 }
mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit
% U( j2 a$ ?4 i! |% I" `* p mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN
9 ^& S) a% ]3 u9 M H4 z% d+ P- v8 E+ v mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT' z% c# ?* K( l* v k
mcasp->regs->PFUNC = 0; // All MCASPs# i5 q( T; P% F# K, a5 }' y% }1 s/ m6 U
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1
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mcasp->regs->DITCTL = 0x00000000; // Not used
! c) I/ x# S1 e2 A, M7 ?, y% f mcasp->regs->DLBCTL = 0x00000000; // Not used
! t. P, n+ `- o mcasp->regs->AMUTE = 0x00000000; // Not used
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/* Starting sections of the McASP*/& Y% D! W4 O4 b, n/ {; i- r
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; " g% `5 W- K; X- U# S% J. y
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON );
# e! @8 B; K6 J1 D: h' H0 B mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; 9 G0 W( y" k6 i4 l9 E
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );
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mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON;
, G5 T3 U2 h! @. G8 y while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );+ l) J& _: p r
mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; 1 e& O2 u# p$ ~) L
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );
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mcasp->regs->XSTAT = 0x0000ffff;
& r" ?3 u7 M8 n5 c0 F+ ? mcasp->regs->RSTAT = 0x0000ffff; * K; A6 s4 s; \1 x% _$ u4 a% Z) m
3 W2 Q! B- K2 x9 ^, z mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;
+ ^- h' U! k" r) i while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );5 `9 C# N. Z" j- N
mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; # M* o+ R) |9 ^: y) H1 B* _
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );' `0 B) \: r4 U* j) z
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/* Write a 0, so that no underrun occurs after releasing the state machine */! \% V* K5 K4 B# l: K
mcasp->regs->XBUF5 = 0;
9 s4 o& _7 L/ ]- E/ ] mcasp->regs->RBUF0 = 0;
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( [$ W7 J8 a, O9 U# O mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON;
8 i6 [0 ` F$ b9 E0 ~0 e- G while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );- @6 W3 I# n/ ?+ q
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; 7 O- P. j1 A, v$ n. M8 ~
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );
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$ R& v, J% w* b& b# {9 }/ @ mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; * j: D. @1 m0 I* ^2 B$ M
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );
& q0 P9 f+ u- v. `3 ^6 H4 X" f1 p% Z mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON;
1 J( r0 O( S3 j while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );8 I; [0 y5 C' x2 d1 w4 g
9 _7 i. t5 F& m CSR = 0x0000;( e! R) o% i! _ M' M" L/ ^
INTC_INTMUX1 = 0x3d;, Y' V- V# J% J. [0 b) i
ISTP = (unsigned int)vectors;6 [8 \. C! T3 J6 F* _
ICR = 0xFFF0;
2 ], f5 U5 v: i/ ] IER |= 0x12; ' a P+ Q6 S. R* j7 u
CSR |= 0x01;
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3 S, a4 ^6 G8 I5 R% N, I2 }! C8 B7 J/ ?还有就是两个输入输出函数:
) {9 H- t! M' A. O) vvoid output_sample(Int32 out_data)
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* r( e* H% o" p' t% Y AIC31_data.uint = out_data; % a, p! w8 G" o$ E
MCASP1_XBUF5_32BIT = AIC31_data.uint;, @7 r j% r: c4 j/ R$ M6 c/ A
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- B5 V# }+ M4 g$ j1 wInt32 input_sample(void), K0 U. _6 T" N1 X7 }
{
+ B! w' e7 J- ~5 v2 K AIC31_data.uint = MCASP1_RBUF0_32BIT;
5 E/ y9 @; v" {8 x5 l return (AIC31_data.uint);/ Q8 c; N" T! g; R/ d( E7 w0 w+ T
}
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