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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
: e; c4 N0 E/ S0 c% V$ f0 ^main文件:
* `; i W8 e* I# t hinterrupt void interrupt4(void) 5 V1 [0 |3 X! ] t7 O2 D( R9 d b4 l
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Uint32 sample;
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# z! V; d3 P$ l; L" @ sample = input_sample(); // read L + R samples from ADC
. V7 R9 U+ J- r0 ? output_sample(sample); // write L + R samples to DAC 7 `5 M! |( X4 k) p4 ^" x6 e& O& ^0 y: h
return;! U- T. ? `$ _3 O$ D7 L
}
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' J" z( G7 H. @) H8 v) }int main( void )
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/* Initialize BSL */9 Q% d* V& W! g$ V' W
EVMC6747_init( );5 U4 b2 u1 q- {% e
/* Call evmc6747_intr function */" U4 z# @" j+ o7 D: l
aic3106_init( );7 Q6 X* T% C( ^# @% ?4 S
while(1);
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aic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题* J5 b e! y3 v" J2 ?$ |5 Y9 |' C
/* Initialize MCASP1 */% p* s. N& G( H, `9 F- R( S
mcasp = &MCASP_MODULE_1;
: Y6 A% G# a% U5 @ mcasp->regs->GBLCTL = 0; // Reset
; Z, i- N( v6 F+ Q mcasp->regs->RGBLCTL = 0; // Reset RX
6 Y% \% f8 T9 I% p# s mcasp->regs->XGBLCTL = 0; // Reset TX7 }' D& O& x) g. X: m' z4 b
mcasp->regs->PWRDEMU = 1; // Free-running
1 R9 s3 d$ u3 U // configure McASP0 receive registers0 E$ `* y0 B9 f- u' Q) g
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used
& j( Y5 @- e: f( r/ B mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
/ A$ A7 @! ^) @# @ mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word' j+ b2 N0 M# C* {9 Z6 Y
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
) d, R, f# k5 ?" P+ N& V! m+ W mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)
/ j' [# \ L% |2 w2 A mcasp->regs->RTDM = 0x00000003; // Slots 0,1# Q& G- Q0 C* H3 m
mcasp->regs->RINTCTL = 0x00000000; // Not used2 }8 ]# u Z5 ~: A% K8 Z" O
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256% ~) h' Z+ A* l: d6 q5 R4 K
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mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used3 I2 }/ [$ \9 M! L/ k6 j
mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus; G6 L- e+ G. V" \9 x
mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word+ K) E7 v U, ~* W; R: A$ k
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16
5 f3 S- N' o" a3 s7 c mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK3 b6 V2 ?; U) ?* t( N+ v& y
mcasp->regs->XTDM = 0x00000003; // Slots 0,1
( C$ }5 s+ Z/ w0 G mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit( r& O: b- Q6 j( E
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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8 }" R7 ^' _" _: L mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN0 p+ l( Q {3 M w( \) [
mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT
% L/ d7 d7 \- N" _' f mcasp->regs->PFUNC = 0; // All MCASPs: w4 a% Y e/ Z% r3 i: R% }- x
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1! s5 v+ ~% g; P* E
* P2 U% y' d4 }8 J4 A mcasp->regs->DITCTL = 0x00000000; // Not used
1 j. w) j' H. D8 n5 b9 y mcasp->regs->DLBCTL = 0x00000000; // Not used
' V, M( L6 x9 p+ `" ^6 }' _ mcasp->regs->AMUTE = 0x00000000; // Not used; u' w0 I! P# p m" U9 k
2 K* n, X+ B# S& n/* Starting sections of the McASP*/! H& C- { k1 X' ]0 P* e
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 0 r- _* C1 K2 ?' H
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON );
2 I+ v/ Z3 j7 P7 I mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; % A4 H1 d: E2 H1 k5 n
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );
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mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; % [& x( h Y! e" u0 j
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );
" |; {2 }, T! K6 Y% ^$ _6 s mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON;
! w3 P. e$ X/ M1 ] while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );
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mcasp->regs->XSTAT = 0x0000ffff;
+ t1 n# Z7 f* n7 J6 H mcasp->regs->RSTAT = 0x0000ffff;
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mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;
6 {* U/ f5 r! b8 } while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );
3 A. H) P [9 H; b8 u+ G& O mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON;
& L' e( ]" W' S! [ while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );# T1 r5 H2 [; ~& e
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/* Write a 0, so that no underrun occurs after releasing the state machine */7 ~$ h$ |0 ~7 {- k! W
mcasp->regs->XBUF5 = 0;/ J8 @) U0 X# F& R3 g5 \
mcasp->regs->RBUF0 = 0;
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2 b7 D! P8 I( {& C! L' _4 h) o mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; , z1 S% W" L( K0 R U
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
; c. s* d/ o D0 m9 x: I! A! H% ` mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON;
+ P3 Y3 U* Q. _2 u! Y while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );; x) p3 ]: F- ]
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mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; " Y" }# G' h" I) e
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );
; Z( s( r: L: Y4 t3 A8 H$ ^7 w mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; / Y" D7 y2 {$ C, R
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );0 ?5 O) D o! ~6 P. a
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CSR = 0x0000;
2 s# c- q* n3 a- S C INTC_INTMUX1 = 0x3d;
, [ \- L, ^' } Y ISTP = (unsigned int)vectors;
. s8 w3 c& x- v; Z) H R ICR = 0xFFF0;
3 c2 y4 G9 v4 C. W IER |= 0x12; # A* y. T7 o+ q$ Z/ w6 T
CSR |= 0x01; M/ k( x+ z9 Y5 o5 f+ _
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2 R7 Y. ?% n' ^还有就是两个输入输出函数:
5 I( K/ f c1 ]1 M' V! D N, ]void output_sample(Int32 out_data): l3 P) e- \8 X# p6 ?, R
{
3 d$ ~! |! l! g0 V1 w% U* L) A7 E' \0 z AIC31_data.uint = out_data;
: h0 ]5 c& q5 r) ^6 y) { MCASP1_XBUF5_32BIT = AIC31_data.uint;) \: k2 Z: n3 J" o
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Int32 input_sample(void)3 K% M' r$ @% R6 ~! X( e
{
5 x- W0 J; z* B g3 S: x, C AIC31_data.uint = MCASP1_RBUF0_32BIT;* l8 w9 } j3 ~+ p" R% `+ K7 z1 q7 f
return (AIC31_data.uint);* i6 i2 A5 y7 w1 `+ I Z/ ~, ~
}
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