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The timers support the following features:8 F! R$ I" k, e. @/ M `
• Configurable as single 64-bit timer or two 32-bit timers. z+ R" }8 p5 t \9 I
• Period timeouts generate interrupts, DMA events or external pin events( s& ]& P/ R7 w. o2 M2 L+ N* o
• 8 32-bit compare registers
( f8 G; b; E j, j• Compare matches generate interrupt events! K/ I; o3 J# N8 F
• Capture capability
9 u7 F! h6 L1 v% A* e• 64-bit Watchdog capability (Timer64P1 only)" k, d/ V. [; Y) U; N
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* T0_BOT: Timer 0, bottom : Used for clock_event8 C1 V4 s) _" p; s- k0 v
* T0_TOP: Timer 0, top : Used for clocksource
/ o# r+ `" Q& E6 D( b7 B * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
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