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The timers support the following features:8 D& b' K! R1 e6 d& }; t" V& ]
• Configurable as single 64-bit timer or two 32-bit timers
0 A( F' N3 E! }• Period timeouts generate interrupts, DMA events or external pin events
* f) A8 U4 s' y• 8 32-bit compare registers b6 x8 ?5 ~9 d+ R' @, E7 W
• Compare matches generate interrupt events% S# x& b8 `! p7 Q; V) m7 F$ e. y) {
• Capture capability
5 V3 l: s- G) G' f• 64-bit Watchdog capability (Timer64P1 only)/ g" ~4 k$ n& p8 ]0 [4 X
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/ m" a3 _3 i7 B" x * T0_BOT: Timer 0, bottom : Used for clock_event
! R$ V1 h" A# H- p; B" o$ L4 F * T0_TOP: Timer 0, top : Used for clocksource: `$ m' b( a! p+ @+ w& o& S
* T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
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