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The timers support the following features:4 d2 Q3 s v) l/ e) }# e
• Configurable as single 64-bit timer or two 32-bit timers/ D1 \* o9 ^8 u# w x2 A4 N; k
• Period timeouts generate interrupts, DMA events or external pin events
% Z' x& Z' ?- I• 8 32-bit compare registers
/ a$ x" ~: N7 {# i) V$ |• Compare matches generate interrupt events( o; X; \( e# S4 [# _* y
• Capture capability4 X$ w3 R8 N/ n, d
• 64-bit Watchdog capability (Timer64P1 only)
2 [' k* U9 U0 S- F7 w3 Z7 @" h+ w* Y; H" X* k) |
/*2 w% D- f" A) m% j( ^
* T0_BOT: Timer 0, bottom : Used for clock_event
4 X! p* f$ ]* b$ t * T0_TOP: Timer 0, top : Used for clocksource& j; n9 W3 A& M! v; q* O I
* T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer4 z) T$ u1 k0 [* _) i4 a
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发表于 2016-10-8 16:56:08
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