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The timers support the following features:! t- O! S8 \8 K
• Configurable as single 64-bit timer or two 32-bit timers/ ~. H- D4 o9 \: U
• Period timeouts generate interrupts, DMA events or external pin events2 I/ C& E& \& i
• 8 32-bit compare registers$ T* \! g: _* r
• Compare matches generate interrupt events
2 o; ]% I: z2 A @9 t2 b% m% ]* ?1 U: B• Capture capability' x f9 p- |( i, z
• 64-bit Watchdog capability (Timer64P1 only)
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* T0_BOT: Timer 0, bottom : Used for clock_event
( W; k" f/ s! H/ ^6 \ * T0_TOP: Timer 0, top : Used for clocksource {2 S K* ^4 c7 L$ s
* T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
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