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The timers support the following features:0 L. _2 `1 J. L8 T+ ~# a
• Configurable as single 64-bit timer or two 32-bit timers
8 x- g9 |! X3 n& R• Period timeouts generate interrupts, DMA events or external pin events, P, {3 ]: | y- l
• 8 32-bit compare registers
/ i4 N8 F L1 H- E7 M$ T* Z• Compare matches generate interrupt events
/ C' s$ n1 h, n2 F6 I& F! E• Capture capability
4 e( ^# i& W1 M: m, \9 O& v _# i• 64-bit Watchdog capability (Timer64P1 only)2 N* K- b4 e+ a9 }
8 \- F' d: n; x/*
" @0 l/ O6 P8 g% |$ J9 V * T0_BOT: Timer 0, bottom : Used for clock_event- }/ f0 q: @& n6 D+ R
* T0_TOP: Timer 0, top : Used for clocksource
4 \# M M P5 H7 C# K' r8 I- L * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
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