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The timers support the following features:
+ ], c7 c4 D' h+ b! Z• Configurable as single 64-bit timer or two 32-bit timers
. t/ `- k% Y( R4 D0 `& ]/ ^3 ~, t• Period timeouts generate interrupts, DMA events or external pin events
8 b" A4 j; Z' n$ t" l& T i• 8 32-bit compare registers
+ ?- U8 o: f# ~$ k* s• Compare matches generate interrupt events$ }2 \. I' C8 b# _% u
• Capture capability O+ ^ S" f' _/ j; D3 ^
• 64-bit Watchdog capability (Timer64P1 only)
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* T0_BOT: Timer 0, bottom : Used for clock_event# m) n2 [, k8 k; ]# C5 C
* T0_TOP: Timer 0, top : Used for clocksource! C9 C' s( f' w1 ?
* T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
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