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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
+ O7 Z D% _+ t) l. f" wmain文件:
7 N' m4 [9 K3 B1 P: Y% |5 L! Zinterrupt void interrupt4(void)
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" Y1 f) N' P- p# w; \" k' `: T Uint32 sample;% u6 a; p0 j) t
7 h) |% Y0 u: N( A+ k# i sample = input_sample(); // read L + R samples from ADC* [3 Y$ s w- B5 N8 t, Y) u* B
output_sample(sample); // write L + R samples to DAC
& ^& C; X# T) H. p9 O v return;
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int main( void )
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/* Initialize BSL */* w6 V! f) m z+ x( \) F9 ?
EVMC6747_init( );/ T5 t: g* d+ c M l
/* Call evmc6747_intr function */6 ]2 {* }& g6 }9 H
aic3106_init( );
& ^; Q' Q6 H7 y" i: ?. z1 w while(1);0 p8 P# G8 u6 j. r
}
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& }+ M$ G+ a; a0 a% D! Aaic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题8 V+ R9 |9 o) n" h. w
/* Initialize MCASP1 */* e' p7 t$ S( o9 h
mcasp = &MCASP_MODULE_1;
' f5 L; M$ S2 ?2 | mcasp->regs->GBLCTL = 0; // Reset. A8 D& q- d& e
mcasp->regs->RGBLCTL = 0; // Reset RX
8 {2 C( X) D6 L& x- K$ I/ L mcasp->regs->XGBLCTL = 0; // Reset TX
& w$ O" M$ g, S mcasp->regs->PWRDEMU = 1; // Free-running
" C" X: [5 c, w% E# }" t // configure McASP0 receive registers
5 s K+ Q- A& s$ c mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used
1 P( T5 K9 t. p7 E mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
7 @/ G+ l) x8 T! M a mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word! h" q0 N1 g3 V6 b, \
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)7 \0 |0 ^5 p- } j
mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)
! w9 e( q5 j' T( w, ^7 ~ mcasp->regs->RTDM = 0x00000003; // Slots 0,1
9 X1 D; W' l! R2 k mcasp->regs->RINTCTL = 0x00000000; // Not used7 \, M* B+ Z9 o
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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( P+ c3 K0 b5 w3 s- { mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used3 ]: ~; g, ~& T7 p$ X
mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
, y# x" z7 Y5 E6 @ mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word
E; X8 g2 F [- t$ l mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16
* m1 A& h* T$ o/ L mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK. C3 P7 h- b$ i. v; }2 g
mcasp->regs->XTDM = 0x00000003; // Slots 0,1
1 i: y' c5 }- e/ ]) i& V* D( o" J: y mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit2 P( `. y5 ?5 c, ?! ?9 h
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN
* `' a) u6 ?' A& M5 A mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT" c; m5 M! X" w8 D1 U! a" p
mcasp->regs->PFUNC = 0; // All MCASPs3 } ~- h3 |- M% q# v, B
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX19 {. O: n, H; I+ ~! g8 A
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mcasp->regs->DITCTL = 0x00000000; // Not used
3 A% i# u! v) ]& h mcasp->regs->DLBCTL = 0x00000000; // Not used
7 o b# z" y/ C5 E* ~& a) f. n, n mcasp->regs->AMUTE = 0x00000000; // Not used# T$ a; W+ @; X! }! Q
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/* Starting sections of the McASP*/# J( w& {9 p0 I2 n3 U
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 6 A& k* V/ ], g2 J6 p7 Q
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON );
4 D, L) t$ [: s mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; & R/ S$ D8 Y5 Y4 {$ L1 ?
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );0 `. h- g* I$ Z$ c+ e) m/ R
7 u) z$ K& r( z$ f' W6 t- x mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; & C5 l) U5 [% Y$ O
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );
1 e& w7 |, I/ X! P& E5 I1 q mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; ! z: e$ f: o O* D3 a
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );: q! Z/ R7 C8 K: N# d0 f& d9 g
5 g, p" t L6 Y" ]% A% ^ I mcasp->regs->XSTAT = 0x0000ffff; $ \! H* f8 |. z( R
mcasp->regs->RSTAT = 0x0000ffff; % s& w* a' K6 T1 u& ?6 [' A
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mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;
7 Q" E' h' Z( y& [' h while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );; Q) v; m$ j& b6 [" @
mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON;
1 d9 e1 p' a- p. r/ ^( ]( X+ ]* E while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );) l6 ^5 t2 J& d- |' h7 I; A
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/* Write a 0, so that no underrun occurs after releasing the state machine */
, b+ W/ n$ m% u+ m$ w2 N" c( ~ mcasp->regs->XBUF5 = 0;! i) U3 _: `9 ?3 p+ o! X3 T
mcasp->regs->RBUF0 = 0;
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mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON;
6 g6 X4 V/ U% T1 o9 g while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );% _0 C/ a0 N7 z8 N, U) y
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON;
$ G+ e4 A5 S- f6 u3 s! m while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );
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. u( M4 J8 [5 c5 O- T3 I+ M2 P mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; / k' W+ ~5 n& w6 r) [/ I
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );
% o/ O) p1 y9 f2 L( Z* o- a mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON;
; M+ S+ ]+ K2 |3 H( g while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );
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, q V: l: o0 `4 N N CSR = 0x0000;
( K2 ~1 Q0 p) Q+ Y4 Z. n$ l3 } INTC_INTMUX1 = 0x3d;
3 E9 X c3 O8 k- E$ F: L. k/ [ ISTP = (unsigned int)vectors;
/ r7 Z" W5 b4 ~# @. M( Q4 ~8 O1 [ ICR = 0xFFF0;
; e E2 P& d/ G! k2 Z IER |= 0x12;
4 n- _' |8 U+ N$ a CSR |= 0x01;
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还有就是两个输入输出函数:) U. T" `3 B' T9 e& E- U
void output_sample(Int32 out_data)7 W. ?2 p- p T7 H( n+ L8 W
{
. p7 V+ d1 a/ k* Y2 A5 k( X) y0 G" a U& O AIC31_data.uint = out_data; 1 \- j* o8 z* q
MCASP1_XBUF5_32BIT = AIC31_data.uint;6 L2 {: d' k- ]
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Int32 input_sample(void)8 K' G9 l: e: s$ G1 H) ^
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AIC31_data.uint = MCASP1_RBUF0_32BIT;
; @, X8 \5 w# _" r5 f! u return (AIC31_data.uint);
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