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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
6 S8 s" ~! F: p0 Hmain文件:/ B5 Z" v. |8 \, l7 Y/ }
interrupt void interrupt4(void) + [9 q8 S7 U& ~1 e$ J; x# ~+ u' M
{
/ m! J0 u! H; n) ?+ n6 I- Y* R Uint32 sample;$ X1 ?; T* b/ c Q5 n4 |. ^
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sample = input_sample(); // read L + R samples from ADC7 ~4 D5 _2 [9 y; w
output_sample(sample); // write L + R samples to DAC
- ]- Z% {/ n. N+ i& k/ Y* [ return;
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int main( void )
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; b7 T) t0 f" B: y0 ] O* _0 n y1 K /* Initialize BSL */
5 [3 U$ X: r; T EVMC6747_init( );2 A0 h, _8 {2 {
/* Call evmc6747_intr function */
, ^- q c2 x/ C; C aic3106_init( );
* J4 R6 \5 Q/ d, F while(1);
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4 s& n- c) R" v3 A8 L- s1 }+ s0 |aic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题
6 r9 c; H$ H/ `3 J/* Initialize MCASP1 */
) T2 B, t, _& V/ M' T4 c! Q mcasp = &MCASP_MODULE_1;
. U. Q3 ^5 I0 F5 d3 F mcasp->regs->GBLCTL = 0; // Reset$ t1 ~5 t. e: {# y, O
mcasp->regs->RGBLCTL = 0; // Reset RX6 d/ r r, K+ h- A/ J
mcasp->regs->XGBLCTL = 0; // Reset TX$ I5 A- M1 n: q) N
mcasp->regs->PWRDEMU = 1; // Free-running
+ M2 l, w3 U) Q& \. C // configure McASP0 receive registers
3 G% B5 H7 Q' J mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used: \, S6 [6 g. ^$ K1 Y6 G
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
6 i; a4 Q6 j, n8 I M# v mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word
" s4 U0 Y) d8 t& Y# @ mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
5 j% O, b8 s( |8 H6 i& E8 G mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)9 I+ Z' O; b+ f- O0 T
mcasp->regs->RTDM = 0x00000003; // Slots 0,1
0 s% j, d k; d, e mcasp->regs->RINTCTL = 0x00000000; // Not used
2 ?+ J/ w3 W% R9 `6 G8 y; ~2 _& r2 { mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256& R; D5 L; e( w- ^2 K; _3 T
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mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used2 V# M! m8 O% ?; P
mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
6 Y6 Z& ]- z- a' c2 @. p s mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word F. b& C/ N, A0 E
mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16( Q6 \$ S5 k' |6 d
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK
2 B! i! k3 K7 H) F mcasp->regs->XTDM = 0x00000003; // Slots 0,12 j- `( M _1 `: J( a, C; w& L
mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit
! W$ o' s9 ~0 [5 Z! C* |2 y' j mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN
- B* x- z9 m) v2 W1 z mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT1 q4 i1 t/ t% P2 b! X8 Q1 X: n; I
mcasp->regs->PFUNC = 0; // All MCASPs
; r. h% B" v2 A! g# r mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX1 c6 ?) a% ?* g% h7 X Z4 n
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mcasp->regs->DITCTL = 0x00000000; // Not used t% |5 z! o( ]& x6 j+ o: [
mcasp->regs->DLBCTL = 0x00000000; // Not used
8 ?! f8 g: Q9 r) v/ Q. E, r6 J mcasp->regs->AMUTE = 0x00000000; // Not used/ [6 S' F( H" L
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/* Starting sections of the McASP*/1 L. M6 `& n) E) Z9 q, Y9 a
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON;
5 U& i4 l0 E! I# ~( G while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); $ {# v# D) ^- H8 q( W* h! N
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; + ~) u! ]& P, ^
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );; f2 m8 @7 \1 q4 {- R
. ^# v ?6 J) ^2 h1 C mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; 9 _5 {) Z% x. u/ C" U u
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );
; k; O5 Y' Z3 j mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; 2 ^# D6 k- U: f) z8 o, X
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );
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mcasp->regs->XSTAT = 0x0000ffff;
3 ]. L- o; {; n: G% g; C mcasp->regs->RSTAT = 0x0000ffff; + s- W/ G3 N" z3 p6 J9 U
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mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;
* l8 A& X. r& _0 ^+ t/ E' | while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );
& Z% L8 f9 g! \- m1 a8 d mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; ! J# p' Y6 q/ D% ^/ u
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );) e, [) d0 p e [$ p+ z
( s8 x: D: l( b3 c p /* Write a 0, so that no underrun occurs after releasing the state machine */
$ u2 b6 g4 w2 v1 o# P mcasp->regs->XBUF5 = 0;
, l9 J( I0 b9 d8 u mcasp->regs->RBUF0 = 0;3 k6 r" Q$ }. p- w2 l
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mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; , w& f& k( _2 L* F3 x0 M! Z- _8 M
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
. F! A+ B2 Y. d mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; + z3 ^2 z) ?' ]9 [$ A$ Z7 i
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );, p% B. C7 k# y- g' z
2 p6 k. w# [' S, B+ o1 m( s% M mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; & Z5 [3 h3 N+ I+ J) n2 m
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );
7 ?3 u. Z% H$ P* b7 k2 A mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON;
& \4 B7 r- T A2 e2 o) l while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );& w+ i+ _- a6 n8 V/ i6 ]
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CSR = 0x0000;4 d. o# _$ G. S) u( E2 M5 x
INTC_INTMUX1 = 0x3d;1 y) G& Y- J; L V/ I
ISTP = (unsigned int)vectors;
% I7 B; J9 z. ~! J ICR = 0xFFF0; ! S% {% e1 s. J0 }! O& D4 l
IER |= 0x12; 0 v% {+ a" v" M4 ~* X% q
CSR |= 0x01; . o) V- J1 D; x: H8 Z) k
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还有就是两个输入输出函数:! Y3 ?0 c5 m" e! A1 }
void output_sample(Int32 out_data)
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AIC31_data.uint = out_data; O; p T$ K# {4 {) A
MCASP1_XBUF5_32BIT = AIC31_data.uint;
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! ~% o1 A9 I' d) G& l8 c6 m. TInt32 input_sample(void)
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% f% q7 U* _/ Q* t6 \( K' y1 P- ]; N; ` AIC31_data.uint = MCASP1_RBUF0_32BIT;
& J+ K6 w- v+ d# v9 o+ W0 ` return (AIC31_data.uint);0 L) D9 \# r) b' n1 J
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