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C6747和C6748感觉差不多,我想实现McASP发送中断方式控制音频信号,在轮询的例程基础上改的,轮询程序可以实现,但是中断一直实现不了,也找不到错误,求大神帮忙!下边是主要程序:
8 a& n! ]' s8 W6 bmain文件:+ G9 D7 b% h; M/ | j6 a
interrupt void interrupt4(void)
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9 Z+ |# B/ v1 p# G& n" i4 P5 T Uint32 sample;: J: X) `9 ~ B) \( A2 z
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sample = input_sample(); // read L + R samples from ADC0 _1 K8 L/ r4 j. K5 u& T* c) f
output_sample(sample); // write L + R samples to DAC , I2 R. d4 Q( Q @; g
return;
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int main( void )
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, ^5 U+ P: f- O /* Initialize BSL */
9 w6 r, p$ ^3 H+ K2 a EVMC6747_init( );( } N- r8 a6 T* e9 D
/* Call evmc6747_intr function */& o( g8 Y1 `) X# D
aic3106_init( );
, A* ?# V) z8 t3 O) L while(1); R! s+ r$ Q- a# [6 i: _
}
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/ v8 n$ N2 h" R4 ^- J; b. ~aic3106_init文件的一部分,McASP配置部分,采用内部时钟,I2S方式,同步传输。音频芯片的配置应该没问题3 [. n5 \0 I2 k1 d+ f
/* Initialize MCASP1 */6 d: t; ?9 C( G$ K- S, O$ x
mcasp = &MCASP_MODULE_1;- b; l5 S0 a: i5 E: s, q
mcasp->regs->GBLCTL = 0; // Reset
" G8 H5 X" r$ s8 ^ R+ w/ E0 X mcasp->regs->RGBLCTL = 0; // Reset RX0 X, k! T/ O4 u7 H( k& t1 h- c
mcasp->regs->XGBLCTL = 0; // Reset TX
" E, \' h1 L3 b/ \3 J5 d mcasp->regs->PWRDEMU = 1; // Free-running4 X0 L. K4 P! v2 [7 z$ h
// configure McASP0 receive registers: |3 a2 J1 [% @6 F& U5 ^# q4 h0 n
mcasp->regs->RMASK = 0xFFFFFFFF; // No padding used8 F! W- r, P- [1 g$ m7 O( R
mcasp->regs->RFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
# ^5 k7 L7 T3 a" O2 T mcasp->regs->AFSRCTL = 0x00000112; // 2TDM, 1bit Falling, External FS, word) ~. ?" L& e8 U: d6 |) T
mcasp->regs->ACLKRCTL = 0x000000AF; // Rising INTERNAL CLK,(from tx side)
' n1 C( @7 ]4 ` mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)) v2 l8 x" A' g1 Y* {* j, \
mcasp->regs->RTDM = 0x00000003; // Slots 0,1. c% Y& B- j' J7 u" I1 N
mcasp->regs->RINTCTL = 0x00000000; // Not used9 I& a" n& F+ L; }
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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mcasp->regs->XMASK = 0xFFFFFFFF; // No padding used* a& ?: K; E+ P; E$ b7 C
mcasp->regs->XFMT = 0x00018078; // MSB 16bit, 0-delay, no pad, CFGBus
( U8 A2 s ~7 s- F% X mcasp->regs->AFSXCTL = 0x00000112; // 2TDM, 1bit Rising edge INTERNAL FS, word
4 L6 o1 s" [; J: x3 W7 x mcasp->regs->ACLKXCTL = 0x000000AF; // ASYNC, Rising INTERNAL CLK, div-by-16: q9 q, I' B. U, q/ W
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK
) n& Q1 ~5 l, u1 ^ mcasp->regs->XTDM = 0x00000003; // Slots 0,1
6 a" ?( }9 \( c6 n, E+ @3 _- V @ mcasp->regs->XINTCTL = 0x00000020; // interrupt on transmit0 k, }' u. b; m# m4 r
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
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mcasp->regs->SRCTL5 = 0x000D; // MCASP1.AXR1[5] --> DIN
- c) l. Z4 w! e" X mcasp->regs->SRCTL0 = 0x000E; // MCASP1.AXR1[0] <-- DOUT
$ W. f1 I3 k- U$ X( h7 A; M$ Z# a mcasp->regs->PFUNC = 0; // All MCASPs- x7 `" U& e, h" ]* Y6 d
mcasp->regs->PDIR = 0x14000020; // All inputs except AXR0[5], ACLKX1, AFSX12 p# j1 i0 Q3 R4 c$ p7 c: U4 q
4 T. t5 ?+ _/ U0 B mcasp->regs->DITCTL = 0x00000000; // Not used4 {' {( W- H3 K4 P$ {
mcasp->regs->DLBCTL = 0x00000000; // Not used
- [* u( M$ F! P+ y" A: v2 Q mcasp->regs->AMUTE = 0x00000000; // Not used# k( d4 S N* H3 J- a1 e
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/* Starting sections of the McASP*/5 t( I) _3 |' ]' ]
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; 2 z( m: E- G4 ~- X: A' x, y
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON ); + i7 W5 Q7 y; ^7 `
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON;
/ e/ _" J( W" ^6 C" n, R( j& } while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );* l8 @. V$ W5 h( P! K6 ^; i, K. B5 i
' E# m! p0 o W$ E2 ] mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON;
4 w6 t7 G/ A7 h* G( P while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );
8 p6 u/ ^( Y5 G4 T: @! x mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; 0 Z% A% E ]; R) ^& Q6 [1 Z
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );
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mcasp->regs->XSTAT = 0x0000ffff; ~. p% E0 v& u
mcasp->regs->RSTAT = 0x0000ffff;
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; j7 @% H& @: Q- q7 Y8 } mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON;
/ {/ ^, W! {, T, Z$ a, m while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );
9 k/ T, [- V4 a0 G% ] \5 ^ mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON;
6 p7 k }4 K8 K# @5 A0 z8 I, P! i$ D while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );, T/ s! @' ^4 `, Q. E
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/* Write a 0, so that no underrun occurs after releasing the state machine */
- b! J# P. r) a$ e- g mcasp->regs->XBUF5 = 0;
6 E4 b1 W M0 }4 q mcasp->regs->RBUF0 = 0;
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mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; 1 p6 I0 z: R9 X! }% O
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
; R8 j0 s# `* U+ e mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON;
( Q% w) w6 [0 h+ g+ k w+ N while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );) y* s' w+ p4 N" n! Y8 _2 o) ]
; t& n& ] c5 {( ^% p0 ^& M7 B mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; " D: ^7 M2 F( |& j7 X" _
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );5 H5 F2 @; \" r: R
mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON;
5 y+ q: L0 S% g* T7 c T0 p while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );
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; _6 X" z4 E0 n( k: `, @3 H \- P CSR = 0x0000;
6 S( F1 E/ }) {8 V INTC_INTMUX1 = 0x3d;
7 Y0 v* t) }2 W3 d# j" L ISTP = (unsigned int)vectors;
% C" y6 N5 N v' @, ]0 A ICR = 0xFFF0;
: R( X, Y: l( x/ [ IER |= 0x12; 6 l% y, {; Y* \' E
CSR |= 0x01; 7 U! c7 g, g( @. w1 Y% _" ^( c; A
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还有就是两个输入输出函数:6 s, W6 a$ W8 c4 B( w: w: R; H
void output_sample(Int32 out_data): P$ ^& X( } j8 G% Y! m
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AIC31_data.uint = out_data; * h5 \; J2 Z7 @$ W8 k7 t
MCASP1_XBUF5_32BIT = AIC31_data.uint;
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Int32 input_sample(void)
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: J" ]' X( u8 X; d# `- } AIC31_data.uint = MCASP1_RBUF0_32BIT;/ S+ e: x" n' x2 z& {
return (AIC31_data.uint);
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