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我的McASP配置分别如下:
8 } p5 s( }+ E" O" ]管脚的复用设置是:8 A: K2 B! |; ^3 l5 D' `
void McASPPinMuxSetup(void)
8 u- }; n5 C( k4 e+ _$ K7 t3 R' q8 @{
. K# e2 q( V4 b# Z7 S( s$ m unsigned int savePinMux = 0;
* k$ A# R0 r/ T1 ^3 } savePinMux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) & \
* g9 ]# E) ]2 r2 y* u K, p ~(SYSCFG_PINMUX0_PINMUX0_27_24 | \
4 G" \. s) k! d SYSCFG_PINMUX0_PINMUX0_23_20 | \
- [( u0 w; n! J! j8 m SYSCFG_PINMUX0_PINMUX0_19_16 | \
5 s( L! U! S( e j. K SYSCFG_PINMUX0_PINMUX0_15_12 | \; u& y/ Q5 }0 P) u5 w
SYSCFG_PINMUX0_PINMUX0_11_8 | \2 r; K: j; b, n
SYSCFG_PINMUX0_PINMUX0_7_4 | \' }( n- ^8 W% w% \3 |
SYSCFG_PINMUX0_PINMUX0_3_0);! v( `; p' p# y- N- B
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) = \
6 R* O7 Q( H' q. c" u h( U (PINMUX0_MCASP0_AMUTE_ENABLE | PINMUX0_MCASP0_AHCLKX_ENABLE | \$ ^9 O* }' g( Z B+ |& [
PINMUX0_MCASP0_AHCLKR_ENABLE | PINMUX0_MCASP0_AFSX_ENABLE | \5 ?9 A3 `5 U( D1 I" A
PINMUX0_MCASP0_AFSR_ENABLE | PINMUX0_MCASP0_ACLKX_ENABLE | \
- r4 g4 U9 Y" Z( [- h PINMUX0_MCASP0_ACLKR_ENABLE | savePinMux);4 O5 `+ L+ c6 I& Z! q
savePinMux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) & \
# R( I4 r9 [) h) c: P" j ~(SYSCFG_PINMUX1_PINMUX1_19_16 | \( T7 J# d4 u8 \3 W; @% ~: _
SYSCFG_PINMUX1_PINMUX1_15_12 | \
% t& F2 n) L4 T( c+ C' i5 B, G4 v SYSCFG_PINMUX1_PINMUX1_11_8 | \ P+ C/ W s& O9 u- Q1 z& I" Q
SYSCFG_PINMUX1_PINMUX1_7_4 | \7 Z' @+ B! U% z& i; ~1 G
SYSCFG_PINMUX1_PINMUX1_23_20 | \% u2 P G" ?7 m$ J" `
SYSCFG_PINMUX1_PINMUX1_27_24 | \! e" S8 e7 U. a& K# \' J
SYSCFG_PINMUX1_PINMUX1_31_28- b8 `8 U1 Y& M8 A1 B
);! K0 w, ~/ g6 ~% U% d0 u5 n
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) = \
$ Z9 T! C; y D0 P" M' }- q/ d* m (PINMUX1_MCASP0_AXR11_ENABLE | \
: u2 T, ~" V* N+ D* a PINMUX1_MCASP0_AXR12_ENABLE | \3 Q1 K! E; G: w- m! N
PINMUX1_MCASP0_AXR13_ENABLE | \: A- X' |' P q1 U" y- `! a
PINMUX1_MCASP0_AXR14_ENABLE | \
& J3 F6 d, d1 X2 h9 \& G PINMUX1_MCASP0_AXR8_ENABLE | \1 G* [/ K) c2 D6 `& n9 k# g" J! y
PINMUX1_MCASP0_AXR9_ENABLE | \
0 c# e$ {) q* R8 O7 X6 x PINMUX1_MCASP0_AXR10_ENABLE | \
, C# z: W; N- D0 a; _! I savePinMux);, t- {8 g4 Q( N6 P
} O. b( o7 q c
( s0 I& F9 i" e. ~- d5 N, r
1.McASPI2SConfigure(); McASP的配置程序如下:
+ I, M; w3 G, tstatic void McASPI2SConfigure(void), G: S5 f: D, w; d, l
{! H C& `( b( ^6 G
McASPRxReset(SOC_MCASP_0_CTRL_REGS);1 A* |8 A+ m( L; q
McASPTxReset(SOC_MCASP_0_CTRL_REGS);
9 X% Z; ^9 l0 c# W% V3 }* U! O- G3 R2 [6 y+ I( J3 W0 @* L. k
/* Enable the FIFOs for DMA transfer */) f, i; E. z Y3 d8 K( l9 r
// McASPReadFifoEnable(SOC_MCASP_0_FIFO_REGS, 6, 1);
% y+ w( l+ D) {, ?1 s! x4 p8 H" {1 u( ~// McASPWriteFifoEnable(SOC_MCASP_0_FIFO_REGS, 1, 1);$ D9 l0 h4 q' u7 m' j* @
3 s8 Z; Q" U5 n# z- m: b1 n9 Z
/* Set I2S format in the transmitter/receiver format units */) H( J8 \/ x" d
McASPRxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,: X8 ?$ S( F9 A
MCASP_RX_MODE_NON_DMA);/ M1 I( s; a% i6 W. a
McASPTxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,
7 l' M) v) y: c5 ~* ^, I MCASP_TX_MODE_NON_DMA);1 K8 m; l5 B( f/ k
8 [! y! f) s6 T+ \
/* Configure the frame sync. I2S shall work in TDM format with 2 slots */2 ]# V; a& v, W
McASPRxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_RX_FS_WIDTH_WORD,
[- i5 n: ]& [1 k; `- w9 F8 v& h MCASP_RX_FS_EXT_BEGIN_ON_FALL_EDGE);
: K# n; G6 u. X% ` McASPTxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_TX_FS_WIDTH_WORD,
p) z& d a' Z$ l6 h+ ?, Q" K+ x MCASP_TX_FS_EXT_BEGIN_ON_RIS_EDGE);
4 q! F7 j- b- s+ J2 u# h
1 l7 g3 q& J2 ?9 M /* configure the clock for receiver */( T+ d% J! L# g" Y# M4 n! U5 O( h) d
// McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_INTERNAL, 16u, 16u);: D9 x) M8 j; u5 d ?2 m
McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL, 0, 0);
) D: a& K, L1 E* G" T8 H McASPRxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_POL_RIS_EDGE);# h& x. E) I$ S. w9 n+ m
McASPRxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLKCHCK_DIV32,* S* Y) D0 S( P4 T6 |0 r5 h
0x00, 0xFF);
+ q9 v- b1 T) H% U' e6 O% r6 Z T' S' b2 `0 |! u# ]5 d" i }" \
/* configure the clock for transmitter */$ }4 l7 I j: b6 s' v
// HWREG(0x01D000A0) = (0x00001F00);
1 j8 r3 f }$ o, n/ h// McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_INTERNAL, 16u, 16u);5 h! n" v* y9 \2 ^
McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL, 0, 0);
/ |! [" v2 F& w3 p |& _" P McASPTxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_POL_FALL_EDGE);
+ c- v# F+ q9 E, z McASPTxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLKCHCK_DIV32,# e4 }0 O4 H o; B" n! X2 J
0x00, 0xFF);
# j9 Q! t9 k8 }9 r+ C! p4 F# c 2 Y* J% q+ {* C, w/ g
/* Enable synchronization of RX and TX sections */
# t' Q4 y0 R, M s/ [ McASPTxRxClkSyncEnable(SOC_MCASP_0_CTRL_REGS);
7 S u. Q: V1 l5 c9 ^# J
2 `. j! @9 ?6 i" d9 k N' B: G. k /* Enable the transmitter/receiver slots. I2S uses 2 slots */
# d2 F8 P2 V3 X9 H McASPRxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);
& x2 J; C% j2 r3 [& _. R McASPTxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);) x3 B! Z- {, l6 y3 |9 F
* B2 R! A* l- o3 M /*( w" W1 Z9 t" b, J
** Set the serializers, Currently only one serializer is set as
+ x8 k8 `: M+ z/ J6 ^ ** transmitter and one serializer as receiver.
3 y5 v7 A n0 K% [. O0 Z */
) t+ c3 h( g8 X6 g McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX);
: K9 J" r v$ P) q- a+ c McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 13u);7 @0 F1 w. D' X9 ]$ q
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 14u);( o- }. ?: M4 s1 K/ z P
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 8u);
: V, R; Y" A) c0 e/ B. g McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 10u);( p& C1 B6 R& C' E; f% a
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 11u);
' A* R! f9 e& G+ W' h
* J7 U$ z/ n4 }, D# R2 B4 s' n McASPSerializerTxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX);
& D! u' t" h; d' j# T
/ D5 B: y! H8 i+ i /*
+ Q+ t! B, ?8 [& b( T ** Configure the McASP pins + e4 M' z/ Z& B* ~
** Input - Frame Sync, Clock and Serializer Rx- T" M4 `0 [* q5 G5 A5 S$ L
** Output - Serializer Tx is connected to the input of the codec / h3 k3 H5 u, R$ T7 _- b- t
*/
/ y U/ c, `# C# g4 k' `) h" e McASPPinMcASPSet(SOC_MCASP_0_CTRL_REGS, 0xFFFFFFFF);: N: s* \( [7 S9 ~0 p1 E
McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS,
& t! ^" U: L5 F7 ^" s* D( ] MCASP_PIN_AXR(MCASP_XSER_TX)) @6 y. j/ Z- w+ I0 g: K
| MCASP_PIN_AMUTE
" q' [7 E3 M& `6 \ );
" C- u* d2 H, }# Q5 E% y McASPPinDirInputSet(SOC_MCASP_0_CTRL_REGS,% M1 N2 s/ B9 K* z' l- g' v# n
MCASP_PIN_AFSX
- m U7 s% }* Z1 q | MCASP_PIN_AFSR
7 \ O- E" X, d* d# c! z | MCASP_PIN_AHCLKX
: k2 ?1 P& A5 d | MCASP_PIN_AHCLKR/ U+ G4 \$ y2 Q8 s! c
| MCASP_PIN_ACLKX
0 i( U4 h# e; Z% d) K1 m | MCASP_PIN_ACLKR
* H2 I7 J# ]9 I: g8 ^7 X' d* X | MCASP_PIN_AXR(MCASP_XSER_RX)
, g- ]' D5 C) t/ @& y j" o' B9 X | MCASP_PIN_AXR(1u<<(13u))* e5 O0 L5 O5 ?( J9 K6 a
| MCASP_PIN_AXR(1u<<(14u))
7 x( W0 l0 N% |3 B" o1 [ | MCASP_PIN_AXR(1u<<(8u))( Y) z) f% u* ^$ P4 C2 X7 v
| MCASP_PIN_AXR(1u<<(10u))
4 R: H; K! S, L% F+ } | MCASP_PIN_AXR(1u<<(11u))& U* f( V0 I. Y4 F) p8 D9 R7 H6 l$ }$ |; b
);
9 _; g! |! r( x3 ?+ p
% y. \& S6 H0 P( O2 T. x7 L) A /* Enable error interrupts for McASP */$ d( Z3 a9 S- f! F! c; v3 E* c4 i! |
McASPTxIntEnable(SOC_MCASP_0_CTRL_REGS,
" |" ~. e. G' d! C9 K( _% ~ MCASP_TX_DATAREADY
: p4 j- Z2 P3 L. f# S! N | MCASP_TX_CLKFAIL & y. C7 m A# ^% d! w& g% @
| MCASP_TX_SYNCERROR' X! @8 z+ i# z$ _: W' |+ x; D
| MCASP_TX_UNDERRUN);
) n6 [/ }5 v4 c
" C5 ^' l; y8 ]* b4 \( m McASPRxIntEnable(SOC_MCASP_0_CTRL_REGS,
, S# `2 t$ W9 }0 Z% j# g* f+ g9 t MCASP_RX_DATAREADY8 O! G% T& E2 _, {+ E( f$ w
| MCASP_RX_CLKFAIL/ v1 R7 F7 h: \, q1 b
| MCASP_RX_SYNCERROR
% f" Y6 z0 r i | MCASP_RX_OVERRUN);
2 X: U+ X4 k% K/ d" d//MCASP_RX_DMAERROR MCASP_TX_DMAERROR% }' U$ B5 O& Q1 l- U
/ z% R0 F9 O! c2 J" N
}
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# {# s; U* B6 e% c/ o0 A8 n2.运行完上述配置后激活发送接受I2SDataTxRxActivate(); 遇到这个问题:程序无法跳出红色部分的语句 G# P; K& w4 g5 L
static void I2SDataTxRxActivate(void)
4 l9 J2 r ^+ Y: L1 p{
" S8 p5 G5 R$ _% F /* Start the clocks */
# c4 d9 \1 i( I McASPRxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL);8 d3 v" U5 B7 V, j9 I
McASPTxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL);# q7 W5 C: b& D/ p- e% h
8 _; N s! A& n% m /* Enable EDMA for the transfer */
4 H/ X9 @+ Y# U// EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_CHA_MCASP0_RX,# h# A/ K' v1 z. l9 P
// EDMA3_TRIG_MODE_EVENT);4 H9 _- K) d5 o+ K# J6 F) z
// EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS,0 d: w, V$ R: ?( S2 l# G
// EDMA3_CHA_MCASP0_TX, EDMA3_TRIG_MODE_EVENT);- t! n8 H' p% b# `" T
/* Activate the serializers */1 K$ J( E( {2 i. w! {4 P: B: H
McASPRxSerActivate(SOC_MCASP_0_CTRL_REGS);
% u) }8 ^* @2 j McASPTxSerActivate(SOC_MCASP_0_CTRL_REGS);1 f7 u" J; ]3 P3 X! E, t
/* make sure that the XDATA bit is cleared to zero */
5 @4 o7 K A0 ^ while(McASPTxStatusGet(SOC_MCASP_0_CTRL_REGS) & MCASP_TX_STAT_DATAREADY);
( ~" v" Y' T: W$ { /* Activate the state machines */
+ @7 X# C0 @/ a9 C: Z5 v- _ McASPRxEnable(SOC_MCASP_0_CTRL_REGS);+ S4 H' |3 h: C9 u
McASPTxEnable(SOC_MCASP_0_CTRL_REGS);
7 m, k: g* ^- I" R, R6 o9 \4 s' o McASPTxBufWrite(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX, 0);
_& L5 t, @' @* o2 z/ F}6 R" y3 k. Y& j/ g
( V9 R& d1 l( {. N
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