|
EMIFANANDInit(NandInfo_t *nandInfo) { nandTimingInfo = (EMIFANANDTimingInfo_t *) nandInfo->hNandCtrlInfo->hNandTimingInfo; } 这句话怎么理解呢?谁能给小弟详细解释一下,谢谢 下面是对应的结构体
; D9 o% k m: W2 l
& W& Z% a( k, M! R
1 F6 M1 w% T% n# O2 c8 H9 y$ `
typedef struct _EMIFA_NAND_TIMING_INFO_ {unsigned int writeSetup; unsigned int writeStrobe; unsigned int writeHold; unsigned int readSetup; unsigned int readStrobe; unsigned int readHold; unsigned int turnAround; } EMIFANANDTimingInfo_t; typedef struct _NAND_INFO_ { unsigned int dataRegAddr; /* ADDR Register address */ unsigned int addrRegAddr; /* CMD Register address */ unsigned int cmdRegAddr; /* Pointer to Memory Controller Structure */ struct _NAND_CTRL_INFO_ *hNandCtrlInfo; /* Pointer to ECC Structure */ struct _NAND_ECC_INFO_ *hNandEccInfo; /* Pointer to DMA Structure */ struct _NAND_DMA_INFO_ *hNandDmaInfo; } NandInfo_t;
* @( T% Q; O& q- F4 p) ?$ y
typedef struct _NAND_CTRL_INFO_ { unsigned int (*WaitPinStatusGet)(NandInfo_t *nandInfo); /* Timing info for the device and the controller */ void *hNandTimingInfo; /* Base address of the controller */ unsigned int baseAddr; /* ECC supported by the controller */ unsigned int eccSupported; /* Wait pin where NAND dev R/B pin is connected */ unsigned int chipSelectBaseAddr[NAND_MAX_CHIP_SELECTS];
2 y1 j+ G5 h. B# P/ w: f} NandCtrlInfo_t;
. ~4 u6 A9 z+ d5 Z: U% |7 L
" g( f# B' n, x4 L, e |