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我的McASP配置分别如下:1 P5 P0 H- W( F" {( Q' m
管脚的复用设置是:
" w4 r8 K. ? K1 Cvoid McASPPinMuxSetup(void)
8 r& c2 _! N7 o5 w{) ^( w* H& D i" V* L+ u
unsigned int savePinMux = 0;
; i7 s: i J2 t! z% P! Z savePinMux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) & \- X. E% L5 D( U8 {; }4 _0 _
~(SYSCFG_PINMUX0_PINMUX0_27_24 | \8 Y/ `: K- w# C4 _: z" q
SYSCFG_PINMUX0_PINMUX0_23_20 | \) r, x) q' [3 N/ r1 E" ^3 ~1 i
SYSCFG_PINMUX0_PINMUX0_19_16 | \
i' u* _" i0 s$ h( S% O% f/ f7 g SYSCFG_PINMUX0_PINMUX0_15_12 | \
) z5 Y9 _! k/ s, C, A% d SYSCFG_PINMUX0_PINMUX0_11_8 | \
" D; Z5 a9 b6 G5 n( z7 M' a: ]+ y SYSCFG_PINMUX0_PINMUX0_7_4 | \' [5 }* P! J: O5 v( N5 f( _9 M
SYSCFG_PINMUX0_PINMUX0_3_0);+ y3 {/ K: O8 n4 z7 I
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(0)) = \
6 F* E, v1 m, Y4 g6 B (PINMUX0_MCASP0_AMUTE_ENABLE | PINMUX0_MCASP0_AHCLKX_ENABLE | \
" C4 v# g5 r5 [0 Y. } PINMUX0_MCASP0_AHCLKR_ENABLE | PINMUX0_MCASP0_AFSX_ENABLE | \, ?$ s* N# d7 i
PINMUX0_MCASP0_AFSR_ENABLE | PINMUX0_MCASP0_ACLKX_ENABLE | \, r M4 a8 P* E: \
PINMUX0_MCASP0_ACLKR_ENABLE | savePinMux);$ `' ^' H6 y1 X( A) s, g( v
savePinMux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) & \+ s3 V2 ~8 O( U5 F& ]' s% f
~(SYSCFG_PINMUX1_PINMUX1_19_16 | \
- f3 U6 ~3 L+ R% E! \1 L SYSCFG_PINMUX1_PINMUX1_15_12 | \' r) L2 s; Q7 z' j+ W
SYSCFG_PINMUX1_PINMUX1_11_8 | \5 I/ J* _4 Q( O9 Q/ {/ H# w
SYSCFG_PINMUX1_PINMUX1_7_4 | \
/ Z+ }" y: m" X6 Y0 p' U g5 M! X SYSCFG_PINMUX1_PINMUX1_23_20 | \
* o. L/ v& ]$ g SYSCFG_PINMUX1_PINMUX1_27_24 | \# l1 U! C3 g* T8 B8 [
SYSCFG_PINMUX1_PINMUX1_31_28
: J6 K. Y" d, _* Q* g4 z );% q- N. }- Z# D) G9 ]
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) = \1 f. u& d; j( Y# W4 g! C
(PINMUX1_MCASP0_AXR11_ENABLE | \$ i8 i8 y5 [( K0 t# b8 j4 m6 v0 c+ @
PINMUX1_MCASP0_AXR12_ENABLE | \
% y, V) D8 i* P' p6 T0 w PINMUX1_MCASP0_AXR13_ENABLE | \0 F1 r' d/ d# k% S
PINMUX1_MCASP0_AXR14_ENABLE | \
- s9 ~5 U8 L* X PINMUX1_MCASP0_AXR8_ENABLE | \
. ?* }6 W: V1 P- N) T3 x' Z h PINMUX1_MCASP0_AXR9_ENABLE | \4 m- m2 i4 d& ]7 }! R
PINMUX1_MCASP0_AXR10_ENABLE | \5 C- ~- Z/ X; T# N% k
savePinMux);) F; H# {2 B/ h8 q2 _
}
' ]9 b) v$ x1 q; v* a
& }1 u8 S* p, ~5 D, x1.McASPI2SConfigure(); McASP的配置程序如下:3 ]7 f% e: B+ E0 ^6 F# S0 S
static void McASPI2SConfigure(void)# e/ c# {& ]; y* h5 `! V5 l
{7 f; F3 N, `6 r: r; `
McASPRxReset(SOC_MCASP_0_CTRL_REGS);+ c. Q. a+ M) }( U0 k
McASPTxReset(SOC_MCASP_0_CTRL_REGS); n/ J) o% ?" ?4 k$ B
4 R; H5 ^& ?3 q3 k
/* Enable the FIFOs for DMA transfer */$ p0 e, i9 N! D* J A
// McASPReadFifoEnable(SOC_MCASP_0_FIFO_REGS, 6, 1);
& j6 R& U0 G$ z/ p( c// McASPWriteFifoEnable(SOC_MCASP_0_FIFO_REGS, 1, 1);9 u M: X/ W M8 j) I8 P4 h
; }9 y8 m1 U e* u6 A /* Set I2S format in the transmitter/receiver format units */
% n3 N- _4 H0 ] McASPRxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE,
# j( x. t, p1 u, O+ r/ S' i6 m- ` MCASP_RX_MODE_NON_DMA);/ x1 }% O/ u3 X* ~
McASPTxFmtI2SSet(SOC_MCASP_0_CTRL_REGS, WORD_SIZE, SLOT_SIZE," O0 G; M' O; i* `7 Y3 ]
MCASP_TX_MODE_NON_DMA);; @" @) u4 ?0 h4 V2 i
" H. H9 r* v' ?# J' {( z- Z, r /* Configure the frame sync. I2S shall work in TDM format with 2 slots */
$ p) P! g+ ^8 V. D" d8 a McASPRxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_RX_FS_WIDTH_WORD, 1 C4 ]0 ~$ k% m8 T8 i5 o+ x! F* _& n
MCASP_RX_FS_EXT_BEGIN_ON_FALL_EDGE);
7 u* a# I1 k- v( a% o McASPTxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 2, MCASP_TX_FS_WIDTH_WORD,
# E7 [' n$ f- y0 t l/ Z MCASP_TX_FS_EXT_BEGIN_ON_RIS_EDGE);3 V/ o4 b3 Y! i/ v5 [
& x$ z' d3 J9 H7 w& ?
/* configure the clock for receiver */
& F, p/ O' F/ }! R9 U7 a// McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_INTERNAL, 16u, 16u);$ `0 B. Z0 A8 z# z
McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL, 0, 0);% g5 U" v3 n( @9 u- @/ m! K, h
McASPRxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_POL_RIS_EDGE);
|! u- s2 n, v! l* X McASPRxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLKCHCK_DIV32,
, T; t7 p& y- m/ g$ s 0x00, 0xFF);
1 x! J$ d0 T4 T! [/ d* X* Y" a; O( Y+ C+ }- a9 ^7 ?& l
/* configure the clock for transmitter */' @' a; p4 R. X3 F; z u8 k" p
// HWREG(0x01D000A0) = (0x00001F00);/ i/ b# k- j9 j
// McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_INTERNAL, 16u, 16u);' L: g5 {3 d/ \, s
McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL, 0, 0);( _" G' X) G, d+ K! Q" h" H% p' D2 a* ]- w
McASPTxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_POL_FALL_EDGE);+ q. ]4 S8 F. I) S+ i/ y2 s, w
McASPTxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLKCHCK_DIV32,
6 \3 U B" E7 u& o/ E 0x00, 0xFF);. ?* t2 h# C- M9 m1 B
7 l l, c, P2 v# b0 O /* Enable synchronization of RX and TX sections */
% v0 ]* ], _/ Q2 l McASPTxRxClkSyncEnable(SOC_MCASP_0_CTRL_REGS);
! K1 `! T! V2 N8 c* u3 ]
$ o l2 Y( U2 |6 C6 } /* Enable the transmitter/receiver slots. I2S uses 2 slots */
1 d9 o' I# Y6 i# w- |' z: w McASPRxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);
$ j9 Q8 a: p3 I McASPTxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, I2S_SLOTS);7 @$ J8 `9 O6 ~8 N
8 L [6 A; g1 J- w" @1 A
/*
1 E* t0 ~8 |4 e" |$ k ** Set the serializers, Currently only one serializer is set as
& `, B! M5 z/ P ** transmitter and one serializer as receiver.
% Z: M d: y6 @) o */4 \0 G7 d8 A- G
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX);' A$ l% M! Q3 Q
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 13u);
9 u: w! v0 t) Q; \# L4 l) e McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 14u);3 C$ i: h' U+ i6 v
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 8u);% `+ u- S1 Q. e9 p
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 10u);% D& A n7 @7 m/ \
McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, 11u);% h! q" k e: q2 ] k- e$ a5 Y
! ~8 T& \0 Y8 U McASPSerializerTxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX);
/ w% }3 J d; h1 _3 F7 p; u# w' ]. G+ k) H; \7 o
/*
/ \4 b& M* V5 C4 |8 { ** Configure the McASP pins
+ `' J) w0 H# [ ** Input - Frame Sync, Clock and Serializer Rx7 c; s/ W2 U: q5 ]
** Output - Serializer Tx is connected to the input of the codec
. n0 U9 K; k9 B- \$ S: y2 U *// ^ B0 ?; ]" h
McASPPinMcASPSet(SOC_MCASP_0_CTRL_REGS, 0xFFFFFFFF);
' q) d7 Q4 z' X+ q McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS,
2 ^8 S5 ]% \7 H" g$ _; M O7 j MCASP_PIN_AXR(MCASP_XSER_TX)
9 ]- u9 j5 C0 r4 i6 [# ] | MCASP_PIN_AMUTE
7 H$ Q" P" D7 v! ` );1 J* f6 ~# U* K; c
McASPPinDirInputSet(SOC_MCASP_0_CTRL_REGS,, b1 z8 I* g* r& ]
MCASP_PIN_AFSX0 C+ o! X, s9 }+ c+ Q& q# N
| MCASP_PIN_AFSR7 \/ U& P, q# ^$ F. [
| MCASP_PIN_AHCLKX
- O1 G: `, S5 z | MCASP_PIN_AHCLKR6 m/ [1 l: y( `9 w. Y
| MCASP_PIN_ACLKX H& }, a( W n$ V% y i
| MCASP_PIN_ACLKR
0 D; s" E" T% Q6 h( L/ F* t/ } _# Z | MCASP_PIN_AXR(MCASP_XSER_RX), K( L$ [, m# b' _- U
| MCASP_PIN_AXR(1u<<(13u))
+ c8 a+ R8 r s8 l% V& e | MCASP_PIN_AXR(1u<<(14u))
. ^; T5 [+ h7 v+ ~7 w+ P5 @- H) R | MCASP_PIN_AXR(1u<<(8u)); f v" R( D+ D5 }
| MCASP_PIN_AXR(1u<<(10u))
' ~$ P+ K, M1 X7 z | MCASP_PIN_AXR(1u<<(11u))% }/ N3 s: t8 S$ R7 O
);5 b) h) n' u' V+ C+ b. B
5 r" \0 ?: p2 h0 C /* Enable error interrupts for McASP */
5 [9 a' K V; ] s8 `# X McASPTxIntEnable(SOC_MCASP_0_CTRL_REGS,
4 k8 k% f1 X- u4 r: ^ i MCASP_TX_DATAREADY
0 B# T9 e' J, s) F5 M4 u4 f | MCASP_TX_CLKFAIL
; i# S$ F4 @2 n" L- t | MCASP_TX_SYNCERROR; R S& T8 J2 K" [6 f/ a# j
| MCASP_TX_UNDERRUN);
6 z1 M1 \. }% t9 ?
( \* c( R% _( L: r. B. g McASPRxIntEnable(SOC_MCASP_0_CTRL_REGS,
. n/ Z8 G$ y- _" N' f: P8 G MCASP_RX_DATAREADY
) p3 B7 ]: G$ N4 @ | MCASP_RX_CLKFAIL {3 j, h3 h3 X4 I
| MCASP_RX_SYNCERROR
' g' _" r# J- j4 o* D$ G# M. y* N" m | MCASP_RX_OVERRUN);" m! S1 A/ B: {6 {
//MCASP_RX_DMAERROR MCASP_TX_DMAERROR9 K8 u5 I' r+ m1 Z$ t/ E: I+ N. d
) a4 c/ Z% B) x! l! u}
& }% y2 T8 T! i) `0 \* g6 e3 n1 U! @
d; s, X& d) o" c2.运行完上述配置后激活发送接受I2SDataTxRxActivate(); 遇到这个问题:程序无法跳出红色部分的语句
* d& D5 K0 i: i4 \' Q; `2 s# D8 xstatic void I2SDataTxRxActivate(void)
3 `! P* Z! f; G& j- {# s4 d$ I1 Z2 G{; E7 c7 N; i% U9 P+ p3 }
/* Start the clocks */1 K# y6 U @" W
McASPRxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_EXTERNAL);* O2 F; `0 ~4 @8 C
McASPTxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_EXTERNAL);
# d B3 X( N, b. _; D, P: G% z- [ P* d. Y$ [
/* Enable EDMA for the transfer */
; }7 N, }$ x3 A; E// EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS, EDMA3_CHA_MCASP0_RX,
! _5 E8 o& |. a5 g! n+ P// EDMA3_TRIG_MODE_EVENT);0 }% p% ~. s: I7 k' T8 F5 b2 M
// EDMA3EnableTransfer(SOC_EDMA30CC_0_REGS,
& w9 z% z) h5 i// EDMA3_CHA_MCASP0_TX, EDMA3_TRIG_MODE_EVENT);
4 g% b' { L3 Q) ^5 i9 v) W /* Activate the serializers */) @: U3 M5 g6 Z1 U
McASPRxSerActivate(SOC_MCASP_0_CTRL_REGS);
. \* i, C7 X; k8 A" ^ McASPTxSerActivate(SOC_MCASP_0_CTRL_REGS);
' ~1 N7 h5 W, p /* make sure that the XDATA bit is cleared to zero */
1 f ?+ f+ P [0 D9 t% h8 s5 i while(McASPTxStatusGet(SOC_MCASP_0_CTRL_REGS) & MCASP_TX_STAT_DATAREADY);
1 U) I+ k% Y( D6 f8 {" k$ c. c* v s6 g+ e /* Activate the state machines */
) [) o! M5 v7 B. \8 ] McASPRxEnable(SOC_MCASP_0_CTRL_REGS);
3 T: Z% U/ g* ?4 ^' o% x: E McASPTxEnable(SOC_MCASP_0_CTRL_REGS);
' I I4 d% l+ c, N) Y; A McASPTxBufWrite(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX, 0);
. N0 p0 Q" u* `/ D% C; I}
) R: c5 v) M( M! _& I; x9 x
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